MAX9135GHJ+ Maxim Integrated Products, MAX9135GHJ+ Datasheet - Page 16

• Manufacturer Part Number: MAX9135GHJ+
• Description: IC SW LVDS CROSSBAR 32TQFP-EP
• Manufacturer: Maxim Integrated Products
• Type: LVDS Crossbar Switchr

Specifications of MAX9135GHJ+

• Applications: Digital Video
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 7. Topologies for Port Expansion
Programmable, High-Speed, Multiple
Input/Output LVDS Crossbar Switches
Terminate LVDS inputs/outputs through 100Ω differen-
tial termination, or use an equivalent Thevenin termina-
tion. Terminate both inputs/outputs and use identical
terminations on each for the lowest output-to-output
skew.
Adequate power-supply bypassing is necessary to
maximize the performance and noise immunity. Bypass
each supply to their respective grounds with high-
frequency surface-mount 0.01µF ceramic capacitors as
close as possible to the device. Use multiple bypass
vias for connection to minimize inductance.
Separate the I
vent crosstalk. When possible, use a four-layer PCB
with separate layers for power, ground, LVDS, and digi-
tal signals. Layout PCB traces for 100Ω differential
characteristic impedance. The trace dimensions
depend on the type of trace used (microstrip or
stripline).
Route the PCB traces for an LVDS channel (there are
two conductors per LVDS channel) in parallel to main-
tain the differential characteristic impedance. Place the
100Ω (typ) termination resistor at both ends of the
LVDS driver and receiver. Avoid vias. If vias must be
used, use only one pair per LVDS channel and place
the via for each line at the same point along the length
of the PCB traces. This way, any reflections occur at
the same time. Do not make vias into test points for
16
DOUT1
______________________________________________________________________________________
DIN1
DOUT2
MAX9134
DIN2
2
C/LIN signals and LVDS signals to pre-
DOUT3
DIN3
DOUT4
Input/Output Termination
Power-Supply Bypassing
3 x 8 SWITCH
DOUT1
DIN1
DOUT2
Board Layout
MAX9134
DIN2
DOUT3
DIN3
DOUT4
automated test equipment. Make the PCB traces that
make up a differential pair the same length to avoid
skew within the differential pair.
Interconnect for LVDS typically has a differential
impedance of 100Ω. Use cables and connectors that
have matched differential impedance to minimize
impedance discontinuities. Twisted-pair and shielded
twisted-pair cables offer superior signal quality com-
pared to ribbon cable and tend to generate less EMI
due to magnetic-field-canceling effects. Balanced
cables pick up noise as common mode that is rejected
by the LVDS receiver. Add a 0.1µF capacitor in series
with each output for AC-coupling.
I
level to data and clock lines. There are tradeoffs
between power dissipation and speed, and a compro-
mise must be made in choosing pullup resistor values.
Every device connected to the bus introduces some
capacitance even when the device is not in operation.
I
(30% to 70%) for fast mode, which is defined for a data
rate up to 400kbps (see the I
details). To meet the rise time requirement, choose the
pullup resistors so that the rise time t
C
the setup and hold times may not be met and wave-
forms are not recognized.
2
2
DOUT1
C specifies 300ns rise times to go from low to high
BUS
C requires pullup resistors to provide a logic-high
DIN1
< 300ns. If the transition time becomes too slow,
DOUT2
MAX9134
DIN2
DOUT3
DIN3
DOUT4
Choosing Pullup Resistors
6 x 4 SWITCH
Cables and Connectors
DOUT1
DIN1
2
C Interface section for
DOUT2
R
MAX9134
DIN2
= 0.85R
DOUT3
DIN3
DOUT4
PULLUP
x