MAX4105 Maxim, MAX4105 Datasheet - Page 9

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MAX4105

Manufacturer Part Number
MAX4105
Description
The MAX4104/MAX4105/MAX4304/MAX4305 op amps feature ultra-high speed, low noise, and low distortion in a SOT23 package
Manufacturer
Maxim
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX4105ESA
Manufacturer:
MAXIM/美信
Quantity:
20 000
_____________________Pin Description
The MAX4104/MAX4105/MAX4304/MAX4305 are ultra-
high-speed, low-noise amplifiers featuring -3dB band-
widths up to 880MHz, 0.1dB gain flatness up to
100MHz, and low differential gain and phase errors of
0.01% and 0.01°, respectively. These devices operate
on dual power supplies ranging from ±3.5V to ±5.5V
and require only 20mA of supply current.
The MAX4104/MAX4304/MAX4105/MAX4305 are opti-
mized for minimum closed-loop gains of +1V/V, +2V/V,
+5V/V and +10V/V (respectively) with corresponding
-3dB bandwidths of 880MHz, 730MHz, 430MHz, and
350MHz. Each device in this family features a low input
voltage noise density of only 2.1nV/√Hz (at 1MHz), an
output current drive of ±70mA, and spurious-free
dynamic range as low as -88dBc (5MHz, R
___________Applications Information
The MAX4104/MAX4105/MAX4304/MAX4305 have an
extremely high bandwidth, and consequently require
careful board layout, including the possible use of
constant-impedance microstrip or stripline techniques.
To realize the full AC performance of these high-speed
amplifiers, pay careful attention to power-supply
bypassing and board layout. The PC board should
have at least two layers: a signal and power layer on
one side, and a large, low-impedance ground plane on
the other side. The ground plane should be as free of
voids as possible. With multilayer boards, locate the
ground plane on a layer that incorporates no signal or
power traces.
_______________Detailed Description
SOT23-5
4
3
2
1
5
PIN
Layout and Power-Supply Bypassing
1, 5, 8
SO
2
3
4
6
7
_______________________________________________________________________________________
NAME
N.C.
OUT
V
IN+
V
IN-
CC
EE
740MHz, Low-Noise, Low-Distortion
Not internally connected.
Amplifier Inverting Input
Amplifier Noninverting
Input
Negative Power Supply
Amplifier Output
Positive Power Supply
FUNCTION
L
= 100Ω).
Regardless of whether or not a constant-impedance
board is used, it is best to observe the following guide-
lines when designing the board:
1) Do not use wire-wrapped boards (they are much too
2) Do not use IC sockets. IC sockets increase reac-
3) Keep signal lines as short and straight as possible.
4) Observe high-frequency bypassing techniques to
5) Bear in mind that, in general, surface-mount compo-
The bypass capacitors should include 1nF and 0.1µF
ceramic surface-mount capacitors between each sup-
ply pin and the ground plane, located as close to the
package as possible. Optionally, place a 10µF tantalum
capacitor at the power supply pins’ point of entry to the
PC board to ensure the integrity of incoming supplies.
The power-supply trace should lead directly from the
tantalum capacitor to the V
mize parasitic inductance, keep PC traces short and
use surface-mount components.
Input termination resistors and output back-termination
resistors, if used, should be surface-mount types, and
should be placed as close to the IC pins as possible.
The MAX4104/MAX4105/MAX4304/MAX4305 output
offset voltage, V
the following equation:
V
where:
V
1 + R
I
I
R
R
R
The following equation represents output noise density:
B+
B-
e
OUT
OS
G
F
S
n(OUT)
inductive) or breadboards (they are much too
capacitive).
tances.
Do not make 90° turns; round all corners.
maintain the amplifier’s accuracy and stability.
nents have shorter bodies and lower parasitic reac-
tance, resulting in greatly improved high-frequency
performance over through-hole components.
= inverting input bias current (in amps)
= feedback resistor (in ohms)
= source resistor at noninverting input (in ohms)
= gain-setting resistor (in ohms)
= noninverting input bias current (in amps)
= input offset voltage (in volts)
F
= [V
/R
Op Amps in SOT23-5
G
OS
= amplifier closed-loop gain (dimensionless)
1
+ (I
R
R
G
F
B+
OUT
x R
i x R
n
(Figure 1), can be calculated with
S
) + (I
S
2
B-
CC
DC and Noise Errors
x (R
i x R
and V
n
F
||
F
R
EE
||
G
R
))] [1 + R
G
pins. To mini-
2
e
n
F
2
/ R
G
9
]

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