MAX312F Maxim, MAX312F Datasheet - Page 9

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MAX312F

Manufacturer Part Number
MAX312F
Description
The MAX312F/MAX313F/MAX314F are quad, single-pole/single-throw (SPST), fault-protected analog switches
Manufacturer
Maxim
Datasheet

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The MAX312F/MAX313F/MAX314F are fault-protected
CMOS analog switches with unique operation and
construction. These switches differ considerably from
traditional fault-protection switches, with several advan-
tages. First, they are constructed with two parallel
FETs, allowing very low on-resistance when the switch
is on. Second, they allow signals on the NO_ or NC_
pins that are within, or slightly beyond, the supply rails
to be passed through the switch to the COM_ terminal
(or vice versa), allowing true rail-to-rail signal operation.
Third, the MAX312F/MAX313F/MAX314F have the same
fault-protection performance on any of the NO_, NC_,
or COM_ switch inputs. Operation is identical for both
fault polarities. The fault protection extends to ±36V
from GND with ±15V supplies.
During a fault condition, the particular overvoltage input
(COM_, NO_, NC_) pin becomes high impedance
regardless of the switch state or load resistance. When
power is removed, the fault protection is still in effect. In
this case, the COM_, NO_, or NC_ terminals are a virtu-
al open circuit. The fault can be up to ±40V with power
off. The switches turn off when V+ is not powered,
regardless of V-.
These switches have identical pinouts to common non-
fault-protected CMOS switches. They allow for carefree
2, 15, 10, 7
3, 14, 11, 6
MAX312F
1, 16, 9, 8
12
13
4
5
2, 15, 10, 7
3, 14, 11, 6
MAX313F
1, 16, 9, 8
PIN
_______________________________________________________________________________________
12
13
4
5
Detailed Description
2, 15, 10, 7
MAX314F
1, 16, 9, 8
14, 11
3, 6
12
13
Quad, Rail-to-Rail, Fault-Protected,
4
5
Pin Compatibility
COM1, COM2, COM3,
NO1, NO2, NO3, NO4
NC1, NC2, NC3, NC4
IN1, IN2, IN3, IN4
NO1, NO4
NC2, NC3
NAME
COM4
GND
N.C.
V+
V-
direct replacement in existing printed circuit boards
since the NO_, NC_, and COM_ pins of each switch are
fault protected.
Internal construction is shown in Figure 1, with the ana-
log signal paths shown in bold. A single NO switch is
shown. The NC configuration is identical except the
logic-level translator becomes an inverter. The analog
switch is formed by the parallel combination of N-chan-
nel FET (N1) and P-channel FET (P1), which are driven
on and off simultaneously according to the input fault
condition and the logic-level state.
Two comparators continuously compare the voltage on
the COM_, NO_, and NC_ pins with V+ and V-. When
the signal on COM_, NO_, or NC_ is between V+ and
V-, the switch acts normally, with FETs N1 and P1 turn-
ing on and off in response to IN_ signals. The parallel
combination of N1 and P1 forms a low-value resistor
between NO_ (or NC_) and COM_ so that signals pass
equally well in either direction.
When the signal on NO_ (or NC_) and COM_ exceeds
V+, the high-fault comparator output is high, turning off
FETs N1 and P1. This makes the NO_ (or NC_) and
COM_ pins high impedance regardless of the switch
SPST Analog Switches
Logic-Control Digital Inputs
Analog Switch Common Terminals
Analog Switch Normally Closed Terminals
Analog Switch Normally Open Terminals
Analog Switch Normally Open Terminals
Analog Switch Normally Closed Terminals
Negative-Supply Voltage Input. Connect to GND for single-
supply operation. Bypass with a 0.1µF capacitor to GND.
Ground. Connect to digital ground.
No Connection. Not internally connected.
Positive-Supply Voltage Input. Bypass with a 0.1µF capacitor
to GND.
FUNCTION
Positive Fault Condition
Internal Construction
Pin Description
Normal Operation
9

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