MAX9209 Maxim, MAX9209 Datasheet
MAX9209
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MAX9209 Summary of contents
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... Rev 4; 10/07 General Description The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization. The MAX9209/MAX9213 feature programmable DC bal- ance, which allows isolation between the serializer and deserializer using AC-coupling. The DC balance circuits on each channel code the data, limiting the imbalance of transmitted ones and zeros to a defined range ...
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... Storage Temperature Range .............................-65°C to +150°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... DC-balanced mode, 34MHz MAX9209 worst-case pattern, 16MHz MAX9213 C = 5pF, Figure 2 L 34MHz MAX9213 66MHz MAX9213 10MHz MAX9209 I 20MHz MAX9209 CCW 33MHz MAX9209 40MHz MAX9209 Non-DC-balanced mode, worst-case 20MHz MAX9213 pattern 5pF, L Figure 2 33MHz MAX9213 40MHz MAX9213 66MHz MAX9213 85MHz MAX9213 ...
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... MAX9209 20MHz MAX9209 40MHz MAX9209 non-DC- balanced mode, 20MHz MAX9213 Figure 5 (Note 6) 40MHz MAX9213 85MHz MAX9213 8MHz MAX9209 16MHz MAX9209 34MHz MAX9209 DC-balanced mode, Figure 6 16MHz MAX9213 (Note 6) 34MHz MAX9213 66MHz MAX9213 ...
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... DC-balanced mode, Figure 8 Figure 9 TPDD Figure 10 TJIT 595Mbps data rate, worst-case V OD pattern PRBS data. Typical Operating Characteristics = +25°C, unless otherwise noted.) A WORST-CASE PATTERN AND PRBS SUPPLY CURRENT vs. FREQUENCY 100 MAX9209 NON-DC-BALANCED MODE 80 WORST-CASE PATTERN PRBS ...
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Programmable DC-Balanced 21-Bit Serializers = 100Ω ±1 5pF, PWRDWN = high +3.3V WORST-CASE PATTERN AND PRBS SUPPLY CURRENT vs. FREQUENCY 120 MAX9213 DC-BALANCED MODE 100 WORST-CASE PATTERN ...
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... TxOUT1- Inverting Channel 1 LVDS Serial Data Output TxOUT0+ Noninverting Channel 0 LVDS Serial Data Output TxOUT0- Inverting Channel 0 LVDS Serial Data Output LVTTL/LVCMOS DC-Balance Programming Input: MAX9209: pulled DCB/NC MAX9213: pulled See Table 1. EP Exposed Paddle. Solder to ground. Pin Description ...
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Programmable DC-Balanced 21-Bit Serializers TxOUT_- OR TxCLK OUT- TxOUT_+ OR TxCLK OUT+ ΔVOS = |VOS(+) - VOS(-)| (TxOUT_+) - (TxOUT_-) OR (TxCLK OUT+) - (TxCLK OUT-) Figure 1. LVDS Output DC Parameters Figure 2. Worst-Case Test Pattern TxOUT_+ OR TxCLK ...
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... TPPos5 TPPos6 Figure 5. Non-DC-Balanced Mode LVDS Output Pulse Position Measurement Detailed Description The MAX9209 operates at a parallel clock frequency of 8MHz to 34MHz in DC-balanced mode and 10MHz to 40MHz in non-DC-balanced mode. The MAX9213 oper- ates at a parallel clock frequency of 16MHz to 66MHz in DC-balanced mode and 20MHz to 85MHz in non- DC-balanced mode ...
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Programmable DC-Balanced 21-Bit Serializers TxCLK OUT (DIFFERENTIAL) CYCLE TxOUT2 DCA2 DCB2 (SINGLE ENDED) TxOUT1 DCA1 DCB1 (SINGLE ENDED) TxOUT0 DCA0 DCB0 (SINGLE ENDED) TPPos0 TPPos1 TPPos2 TPPos3 TPPos4 TPPos5 TPPos6 TPPos7 TPPos8 Figure 6. DC-Balanced Mode LVDS ...
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PWRDWN V CC TxCLK IN TxOUT_, TxCLK OUT HIGH-Z Figure 9. PLL Set Time PWRDWN TxCLK IN TxOUT_, TxCLK OUT Figure 10. Power-Down Delay TxCLK OUT+ TxCLK OUT- CYCLE DCA2 DCB2 TxIN20 TxIN19 TxIN18 TxOUT2 DCA1 DCB1 ...
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... TxIN19 TxIN18 TxOUT2 TxIN8 TxIN7 TxIN13 TxIN12 TxIN11 TxOUT1 TxIN1 TxIN6 TxIN5 TxIN0 TxOUT0 Figure 12. Non-DC-Balanced Mode Inputs Mapped to LVDS Outputs MAX9209 MAX9213 7 7:1 7 TxIN 7:1 7 7:1 PWRDWN PLL TxCLK IN 21:3 SERIALIZER Figure 13. DC-Coupled Link, Non-DC-Balanced Mode AC-Coupling Benefits Bit errors experienced with DC-coupling can be elimi- nated by increasing the receiver common-mode volt- age range by AC-coupling ...
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... All signal and control inputs except DCB/NC are 5V tol- erant and are internally pulled down to GND. The DCB/NC pin has a pullup on the MAX9209/MAX9213. DCB/NC Pin Default Conditions The MAX9209/MAX9213 have programmable DC bal- ance/non-DC balance. See Table 1 for DCB/NC default settings and operating modes ...
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... Programmable DC-Balanced 21-Bit Serializers MAX9209 MAX9213 2):1 7 TxIN (7 + 2): 2):1 PWRDWN PLL TxCLK IN 21:3 SERIALIZER Figure 15. Four Capacitors per Link, AC-Coupled, DC-Balanced Mode Applications Information Selection of AC-Coupling Capacitors Voltage droop and the DSV of transmitted symbols cause signal transitions to start from different voltage levels. Because the transition time is finite, starting the signal transition from different voltage levels causes timing jitter ...
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... DSV Integrated Termination The MAX9209/MAX9213 have an integrated output ter- mination resistor across each of the four LVDS outputs. These resistors damp reflections from induced noise and mismatches between the transmission line impedance and termination resistor at the deserializer input. In DC- balanced mode, the differential output resistance is part of the RC time constant ...
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... Programmable DC-Balanced 21-Bit Serializers The MAX9209/MAX9213 ESD tolerance is rated for IEC 61000-4-2, Human Body Model and ISO 10605 stan- dards. IEC 61000-4-2 and ISO 10605 specify ESD toler- ance for electronic systems. The IEC 61000-4-2 discharge components are C = 150pF and R S (Figure 16). For IEC 61000-4-2, the LVDS outputs are ...
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... TxIN13 15 TxIN14 16 GND 17 TxIN15 18 TxIN16 19 TxIN17 TxIN18 22 TxIN19 23 GND 24 TSSOP Chip Information MAX9209 TRANSISTOR COUNT: 9458 MAX9213 TRANSISTOR COUNT: 9458 PROCESS: CMOS ______________________________________________________________________________________ Programmable DC-Balanced 48 TxIN3 47 TxIN2 46 GND 45 TxIN1 44 TxIN0 43 DCB/NC 42 LVDS GND 41 TxOUT0- 40 TxOUT0+ TxIN8 1 39 TxOUT1- ...
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... Programmable DC-Balanced 21-Bit Serializers (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) N MARKING AAA TOP VIEW SIDE VIEW NOTES: 1. DIMENSIONS D & E ARE REFERENCE DATUMS AND DO NOT INCLUDE MOLD FLASH. ...
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... For the latest package outline information go to www.maxim-ic.com/packages.) ______________________________________________________________________________________ Programmable DC-Balanced 21-Bit Serializers Package Information (continued) 19 ...
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... Programmable DC-Balanced 21-Bit Serializers (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 20 ______________________________________________________________________________________ Package Information (continued) ...
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... Removed all references to MAX9211 and MAX9215. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 © ...