MAX9450 Maxim, MAX9450 Datasheet - Page 11

• Manufacturer Part Number: MAX9450
• Description: The MAX9450/MAX9451/MAX9452 clock generators provide high-precision clocks for timing in SONET/SDH systems or Gigabit Ethernet systems
• Manufacturer: Maxim

Following the START condition, each SCL clock pulse
transfers 1 bit. Between a START and a STOP, multiple
bytes can be transferred on the 2-wire bus. The first 7 bits
(B0–B6) are for the device address. The eighth bit (B7)
indicates the writing (low) or reading (high) operation
(W/R). The ninth bit (B8) is the ACK for the address and
operation type. A low ACK bit indicates a successful
transfer; otherwise, a high ACK bit indicates an unsuc-
cessful transfer. The next 8 bits (register address),
B9–B16, form the address byte for the control register
to be written (Figure 4). The next bit, bit 17, is the ACK
for the register address byte. The following byte (Data1)
Figure 4. I
Figure 5. SMBus Write Timing Diagram
SMBCLK
SMBDATA
S = Start condition
P = Stop condition
Write Byte Format
Read Byte Format
Send Byte Format
—
—
S
S
—
S
ADDRESS
Slave address: equivalent
to chip-select line
ADDRESS
t
2
SU:STA
C Interface Data Structure
7 bits
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
Slave address: equiva-
lent to chip-select line of
a 3-wire interface
7 bits
ADDRESS
A
t
Data Transfer and Acknowledge
HD:STA
7 bits
______________________________________________________________________________________
t
WR
LOW
—
WR
—
Shaded = Slave transmission
/// = Not acknowledged
B
t
HIGH
ACK
—
ACK
WR
—
—
Command byte: sends com-
mand with no data, usually
used for one-shot command
COMMAND
t
SU:DAT
Command byte: selects
from which register you
are reading
8 bits
C
COMMAND
High-Precision Clock Generators
8 bits
ACK
—
D
ACK
—
Command byte: selects to
which register you are writing
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
ACK
—
COMMAND
—
E
P
8 bits
F
—
S
Receive Byte Format
is the content to be written into the addressed register
of the slave. After this, the address counter of I
increased by 1 (Rgst Addr + 1) and the next byte
(Data2) writes into a new register. To read the contents
in the MAX9450/MAX9451/MAX9452s’ control registers,
the master sends the register address to be read to the
slave by a writing operation. Then it sends the byte of
device address + R to the slave. The slave (MAX9450/
MAX9451/MAX9452) responds with the content bytes
from the registers, starting from the pointed register to
the last register, CR8, consecutively back to the master
(Figures 5 and 6).
—
S
with Integrated VCXO
Slave address: repeated
due to change in data-
flow direction
ADDRESS
G
7 bits
ADDRESS
ACK
7 bits
—
Data byte: data goes into the register
set by the command byte (to set
thresholds, configuration masks, and
sampling rate)
RD
—
Data byte: reads data from the register
commanded by the last read byte or
write byte transmission; also used for
SMBus alert response return address
H
DATA
RD
8 bits
—
I = MASTER PULLS DATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
ACK
—
ACK
—
I
J
Data byte: reads from
the register set by the
command byte
DATA
8 bits
DATA
8 bits
K
ACK
—
t
—
///
SU:STO
—
///
L
t
P
1
BUF
—
—
P
2
P
M
C is
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