IR3502MPBF International Rectifier, IR3502MPBF Datasheet - Page 19

• Manufacturer Part Number: IR3502MPBF
• Description: Complete VR11.0 or VR11.1 power solution.
• Manufacturer: International Rectifier

Specifications of IR3502MPBF

• Package: 32-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 250kHz to 1.5MHz
• Pbf: PbF Option Available

Constant Over-Current Control during Soft Start
The over current limit is fixed by 1.17V above the VDAC. If the VDRP pin voltage, which is proportional to the
average current plus VDAC voltage, exceeds (VDAC+1.17V) during soft start, the constant over-current control is
activated. Figure 11 shows the constant over-current control with delay during soft start. The delay time is set by the
ROSC resistor, which sets the number of switching cycles for the delay counter. The delay is required since over-
current conditions can occur as part of normal operation due to inrush current. If an over-current occurs during soft
start (before VRRDY is asserted), the SS/DEL voltage is regulated by the over current amplifier to limit the output
current below the threshold set by OC limit voltage. If the over-current condition persists after delay time is reached,
the fault latch will be set pulling the error amplifier’s output low and inhibiting switching in the phase ICs. The
SS/DEL capacitor will discharge until it reaches 0.2V and the fault latch is reset allowing a normal soft start to occur.
If an over-current condition is again encountered during the soft start cycle, the constant over-current control actions
will repeat and the converter will be in hiccup mode. The delay time is controlled by a counter which is triggered by
clock. The counter values vary with switching frequency per phase in order to have a similar delay time for different
switching frequencies.
INTERNAL
OC DELAY
Over-Current Hiccup Protection after Soft Start
The over current limit is fixed at 1.17V above the VDAC. Figure 11 shows the constant over-current control with
delay after VRRDY is asserted. The delay is required since over-current conditions can occur as part of normal
operation due to load transients or VID transitions.
If the VDRP pin voltage, which is proportional to the average current plus VDAC voltage, exceeds (VDAC+1.17V)
after VRRDY is asserted, it will initiate the discharge of the capacitor at SS/DEL. The magnitude of the discharge
current is proportional to the voltage difference between VDRP and (VDAC+1.17V) and has a maximum nominal
value of 55uA. If the over-current condition persists long enough for the SS/DEL capacitor to discharge below the
120mV offset of the delay comparator, the fault latch will be set pulling the error amplifier’s output low and inhibiting
switching in the phase ICs and de-asserting the VRRDY signal. The output current is not controlled during the delay
time. The SS/DEL capacitor will discharge until it reaches 200 mV and the fault latch is reset allowing a normal soft
VRRDY
ENABLE
SS/DEL
IOUT
EA
VOUT
OCP THRESHOLD
=VDAC_BUFF+1.17V
3.92V
3.88V
4.0V
1.1V
Page 19 of 39
Figure 11 Constant over-current control waveforms during and after soft start.
START-UP WITH
OUTPUT SHORTED
HICCUP OVER-CURRENT
PROTECTION (OUTPUT
SHORTED)
NORMAL
START-UP
NORMAL
OPERATION
(OUTPUT
SHORTED)
OCP
DELAY
OVER-CURRENT
PROTECTION
(OUTPUT SHORTED)
NORMAL
START-UP
July 28, 2009
IR3502
NORMAL
OPERATION
POWER-DOWN