IR3508ZMPBF International Rectifier, IR3508ZMPBF Datasheet - Page 7

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IR3508ZMPBF

Manufacturer Part Number
IR3508ZMPBF
Description
The IR3508ZM Phase IC combined with any IR XPhase3 Control IC provides a full featured and flexible way to implement a power solution for the latest high performance CPUs and ASICs.
Manufacturer
International Rectifier
Datasheet

Specifications of IR3508ZMPBF

Package
20-Lead MLPQ
Circuit
X-Phase Phase IC
Pbf
PbF Option Available
SYSTEM THEORY OF OPERATION
System Description
The system consists of one control IC and a scalable array of phase converters, each requiring one phase IC. The
control IC communicates with the phase ICs using three digital buses, i.e., CLOCK, PHSIN, PHSOUT and three analog
buses, i.e., DAC, EA, and IOUT. The digital buses are responsible for switching frequency determination and accurate
phase timing control without any external components. The analog buses are used for PWM control and current sharing
between interleaved phases. The control IC incorporates all the system functions, i.e., VID, CLOCK signals, error
amplifier, fault protections, current monitor, etc. The Phase IC implements the functions required by the converter of
each phase, i.e., the gate drivers, PWM comparator and latch, over-voltage protection, phase disable circuit, current
sensing and sharing, etc.
PWM Control Method
The PWM block diagram of the XPhase3
trailing edge modulation is used. A high-gain and wide-bandwidth voltage type error amplifier is implemented in the
controller’s design to achieve a fast voltage control loop. Input voltage is sensed by the phase ICs to provide feed-
forward control. The feed-forward control compensates the ramp slope based on the change in input voltage. The input
voltage can change due to variations in the silver box output voltage or due to the wire and PCB-trace voltage drop
related to changes in load current.
Page 7 of 19
IVSETPT
VDRP
AMP
CONTROL IC
CLOCK GENERATOR
+
-
REMOTE SENSE
AMPLIFIER
IROSC
+
-
ERROR
AMPLIFIER
Compensation
Thermal
VDAC
VDAC
+
-
VN
VSETPT
IMON
IIN
VDRP
PHSOUT
PHSIN
VO
VDAC
LGND
EAOUT
FB
CLKOUT
RVSETPT
RTHRM
RCOMP
CCOMP
RFB1
CFB
RDRP1
CDRP
GATE DRIVE
VOLTAGE
RFB
RDRP
TM
architecture is shown in Figure 1. Feed-forward voltage mode control with
Figure 1: PWM Block Diagram
PHSOUT
PHSOUT
PHSIN
CLKIN
ISHARE
DACIN
EAIN
IOUT
DACIN
CLKIN
PHSIN
EAIN
3K
3K
CLK
D
SHARE ADJUST
ERROR AMPLIFIER
CLK
D
SHARE ADJUST
ERROR AMPLIFIER
Q
PWM
COMPARATOR
Q
PWM
COMPARATOR
+
-
+
-
RAMP
DISCHARGE
CLAMP
RAMP
DISCHARGE
CLAMP
ENABLE
ENABLE
1
-
1
VID6
-
VID6
+
VID6
VID6
+
VID6
VID6
-
+
-
+
+
-
+
-
PHASE IC
PHASE IC
2
2
PWM LATCH
BODY
BRAKING
COMPARATOR
PWM LATCH
BODY
BRAKING
COMPARATOR
DOMINANT
D
CLK
DOMINANT
RESET
D
CLK
RESET
VID6
VID6
VID6
VID6
DFFRH
Q
Q
U248
DFFRH
Q
Q
+
+
+
+
CURRENT
SENSE
AMPLIFIER
CURRENT
SENSE
AMPLIFIER
OFF
OFF
OFF
VID6
OFF
VID6
VID6
+
-
VID6
+
-
PSI
VCC
VCCH
GATEH
SW
VCCL
GATEL
PGND
CSIN+
CSIN-
VCC
VCCH
GATEH
SW
VCCL
GATEL
PGND
CSIN+
CSIN-
PSI
CCS
CCS
Jan 09, 2009
IR3508Z
RCS
RCS
CBST
CBST
COUT
PSI
PSI
VIN
VOSNS+
VOUT
GND
VOSNS-

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