IRMCF312 International Rectifier, IRMCF312 Datasheet
IRMCF312
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IRMCF312 Summary of contents
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... CMOS Description IRMCF312 is a high performance RAM based motion control IC designed primarily for appliance applications. IRMCF312 is designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control. IRMCF312 contains two computation engines. One is Motion Control Engine (MCE magnet motors ...
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... TABLE OF CONTENTS 1 Overview...................................................................................................................................... 4 2 IRMCF312 Block Diagram and Main Functions ........................................................................ 5 3 Pinout........................................................................................................................................... 7 4 Input/Output of IRMCF312......................................................................................................... 8 4.1 8051 Peripheral Interface Group........................................................................................... 9 4.2 Motion Peripheral Interface Group ..................................................................................... 10 4.3 Analog Interface Group ...................................................................................................... 11 4.4 Power Interface Group ........................................................................................................ 12 4.5 Test Interface....................................................................................................................... 12 5 Application Connections ........................................................................................................... Characteristics ..................................................................................................................... 14 6.1 Absolute Maximum Ratings ............................................................................................... 14 6.2 System Clock Frequency and Power Consumption............................................................ 14 6 ...
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... Figure 1. Typical Application Block Diagram Using IRMCF312.................................................. 4 Figure 2. IRMCF312 Internal Block Diagram ................................................................................ 5 Figure 3. IRMCF312 Pin Configuration ......................................................................................... 7 Figure 4. Input/Output of IRMCF312 ............................................................................................. 8 Figure 5. Application Connection of IRMCF312 ......................................................................... 13 Figure 6. Clock Frequency vs. Power Consumption..................................................................... 14 Table 1. Absolute Maximum Ratings............................................................................................ 14 Table 2. System Clock Frequency................................................................................................. 14 Table 3. Digital I/O DC Characteristics ........................................................................................ 15 Table 4. PLL DC Characteristics .................................................................................................. 16 Table 5 ...
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... JTAG port to facilitate emulation and debugging tools. Figure 1 shows a typical application schematic using IRMCF312. IRMCF312 is intended for development purpose and contains 48K bytes of RAM, which can be loaded from external EEPROM for 8051 program execution. For high volume production, IRMCK312 contains OTP ROM in place of program RAM to reduce the cost ...
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... IRMCF312 Block Diagram and Main Functions IRMCF312 block diagram is shown in Figure 2. Figure 2. IRMCF312 Internal Block Diagram IRMCF312 contains the following functions for sensorless AC motor control applications: • Motion Control Engine (MCE o Proportional plus Integral block o Low pass filter o Differentiator and lag (high pass filter) ...
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... Up to three channels of analog output (8-bit PWM) o Two UART C/SPI port o 48K byte program RAM loaded from external EEPROM o 2K byte data RAM. Note 1: Total size of RAM is 8K byte including MCE program, MCE data, and 8051 data. Different sizes can be allocated depending on applications. Note 1 Note 1 IRMCF312 6 ...
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... Pinout Figure 3. IRMCF312 Pin Configuration Attention: Pin 51 must be left floating. Do not connect. IRMCF312 7 ...
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... Input/Output of IRMCF312 All I/O signals of IRMCF312 are shown in Figure 4. All I/O pins are 3.3V logic interface except A/D interface pins. Figure 4. Input/Output of IRMCF312 IRMCF312 8 ...
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... Peripheral Interface Group UART Interface P1.1/RXD Input, Receive data to IRMCF312, can be configured as P1.1 P1.2/TXD Output, Transmit data from IRMCF312, can be configured as P1.2 P3.6/RXD1 Input, 2 P3.7/TXD1 Output, 2 P3.7 Discrete I/O Interface P1.0/T2 Input/output port 1.0, can be configured as Timer/Counter 2 input P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock, needs to be pulled up to VDD1 in order to boot from I P1 ...
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... Output, motor 2 PWM phase V low side gate signal FPWMWH Output, motor 2 PWM phase W high side gate signal FPWMWL Output, motor 2 PWM phase W low side gate signal PFCPWM Output, PFC PWM 2 C clock output, SPI SO- Data line, Chip Select 0 of SPI IRMCF312 2 C EEPROM 10 ...
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... Input, Operational amplifier negative input for DC bus voltage sensing AIN0/VDCO Input/Output, Analog input channel 0 or Operational amplifier output for DC bus voltage sensing AIN1 Input, Analog input channel 1 (0-1.2V), needs to be pulled down to AVSS if unused AIN2 Input, Analog input channel 2 (0-1.2V), needs to be pulled down to AVSS if unused IRMCF312 11 ...
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... PLL power (1.8V) PLLVSS PLL ground return 4.5 Test Interface TSTMOD Must be tied to VSS, used only for factory testing. P5.3/TDI Input, JTAG test data input P5.1/TMS Input, JTAG test mode select TCK Input, JTAG test clock P5.2/TDO Output, JTAG test data output IRMCF312 12 ...
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... Application Connections Typical application connection is shown in Figure 5. All components necessary to implement a complete sensorless drive control algorithm are shown connected to IRMCF312. Figure 5. Application Connection of IRMCF312 IRMCF312 13 ...
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... Figure 6. Clock Frequency vs. Power Consumption Min Typ - -40 ˚C - -65 ˚C - Min Typ 100 Clock Frequency (MHz) IRMCF312 Max Condition 3.6 V Respect to VSS 1.98 V Respect to VSS 1.98 V Respect to AVSS 3.65 V Respect to VSS 85 ˚C 150 ˚C Max Unit 128 MHz VDD2 (1.8V) VDD1 (3.3V) Total 150 14 ...
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... FPWMUL, FPWMUH, FPWMVL, FPWMVH, FPWMWL, FPWMWH, and PFCPWM pins. Min Typ Max 3.0 V 3.3 V 3.6 V 1.62 V 1.8 V 1. 0.8 V 2 3.6 pF ±10 nA ±1 μA 8.9 mA 13.2 mA 15.2 mA 12 17.9 mA 26.3 mA 33.4 mA 24 IRMCF312 Condition Recommended Recommended Recommended Recommended ( (1) 15 ...
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... Typ Max 1.71 V 1 1.2 V ( kΩ 20 kΩ 100 μA - IRMCF312 Condition Recommended V = 1.8 V PLLVDD ( 1.8 V PLLVDD (1) Condition Recommended V = 1.8 V AVDD Recommended V = 1.8 V AVDD (1) Requested between op amp output and negative input (1) ( 0.6 V OUT ( ...
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... SRC current I Op amp output sink SNK current Table 6. Analog I/O DC Characteristics Note: (1) Data guaranteed by design. Min Typ Max 1.71 V 1 1.2 V ( 500 μA - IRMCF312 Condition V = 1.8 V AVDD V = 1.8 V AVDD (1) (1) ( 0.6 V OUT ( 0.6 V OUT (1) 17 ...
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... Power Supply Rejection Ratio Table 8. CMEXT and AREF DC Characteristics Note: (1) Data guaranteed by design. Min Typ 1.53 V 1.66 V 1. Min Typ 495 mV 600 mV 495 mV 600 IRMCF312 Condition Max 1. 3.3 V DD1 1. 3.3 V DD1 - Condition Max 700 1.8 V AVDD 700 1.8 V AVDD (1) - ...
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... PLL lock time LOCK Table 9. PLL AC Characteristics Note: (1) Data guaranteed by design Min Typ 3.2 MHz 4 MHz 32 MHz 50 MHz F ÷ 256 - CLKIN - 200 psec - =1M 1 =10 Xtal =30PF C =30PF 2 IRMCF312 Max Condition (1) 60 MHz (see figure below) (1) 128 MHz (1) - (1) - (1) - (1) 500 μsec 19 ...
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... Unless specified 25˚C. Symbol Parameter T Conversion time CONV T Sample/Hold HOLD maximum hold time Table 10. A/D Converter AC Characteristics Note: (1) Data guaranteed by design. Input Voltage Voltage droop Min Typ - - - - S/H Voltage t SAMPLE T HOLD IRMCF312 Max Condition (1) 2.05 μsec 10 μsec Voltage droop ≤ 15 LSB (see figure below) 20 ...
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... Table 12. Voltage sensing OP Amp AC Characteristics Note: (1) Data guaranteed by design. Min Typ Max - 10 V/μsec - Ω 400 ns - Min Typ Max 2.5 V/μsec - Ω - 650 ns IRMCF312 Condition V = 1.8 V, AVDD ( ( 1.8 V, AVDD ( Condition V = 1.8 V, AVDD ( ( 1.8 V, AVDD ( ...
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... SYNC to PWM output dSYNC3 delay time Table 13. SYNC AC Characteristics Note: (1) AIN1 through AIN6 channels are converted once every 6 SYNC events t wSYNC t dSYNC1 t dSYNC2 t dSYNC3 Min Typ - IRMCF312 Max Unit - SYSCLK 100 SYSCLK 200 SYSCLK (1) 2 SYSCLK 22 ...
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... Table 14. GATEKILL to SVPWM AC Timing 7.7 Interrupt AC Timing Unless specified 25˚C. Symbol Parameter t INT0, INT1 Interrupt wINT Assertion Time t INT0, INT1 latency dINT Min Typ Min Typ Table 15. Interrupt AC Timing IRMCF312 Max Unit - SYSCLK 100 SYSCLK Max Unit - SYSCLK 4 SYSCLK 23 ...
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... C read setup time is determined by the programmable filter time applied to I communication I2CLK I2CLK I2WSETUP I2WHOLD I2RSETUP Min Typ 10 0.25 0.25 0.25 0. filter time 1 2 Table 16 Timing IRMCF312 t I2EN1 t I2RHOLD t I2EN2 Max Unit - 8192 SYSCLK - - T I2CLK - - T I2CLK - - T I2CLK - - T I2CLK ...
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... CS to data delay time CSDELAY t CLK falling edge to data WRDELAY delay time t CS high time between two CSHIGH consecutive byte transfer t CS hold time CSHOLD Min Typ 1 Table 17. SPI Write AC Timing IRMCF312 Max Unit - SYSCLK - T SPICLK - T SPICLK 10 nsec 10 nsec - T SPICLK - T SPICLK 25 ...
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... SPI read data setup time RDSU t SPI read data hold time RDHOLD t CS high time between two CSHIGH consecutive byte transfer t CS hold time CSHOLD Min Typ 1 Table 18. SPI Read AC Timing IRMCF312 Max Unit - SYSCLK - T SPICLK - T SPICLK 10 nsec - nsec - nsec - T SPICLK - T SPICLK 26 ...
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... Each bit including start and stop bit is sampled three times at center of a bit at an interval of 1/ three sampled values do not agree, then UART noise error is generated. BAUD Data and Parity Bit Stop Bit T UARTFIL Min Typ - 57600 - 1/16 Table 19. UART AC Timing IRMCF312 Max Unit - bit/sec - T BAUD 27 ...
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... CAPTURE input low CAPLOW time t CAPTURE falling edge CRDELAY to capture register latch time t CAPTURE rising edge CLDELAY to capture register latch time t CAPTURE input INTDELAY interrupt latency time Min Typ Table 20. CAPTURE AC Timing IRMCF312 Max Unit - SYSCLK - SYSCLK - SYSCLK 4 SYSCLK 4 SYSCLK 4 SYSCLK 28 ...
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... Parameter T TCK Period JCLK t TCK High Period JHIGH t TCK Low Period JLOW t TCK to TDO propagation CO delay time t TDI/TMS setup time JSETUP t TDI/TMS hold time JHOLD Min Typ - - Table 21. JTAG AC Timing IRMCF312 Max Unit 50 MHz - nsec - nsec 5 nsec - nsec - nsec 29 ...
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... O Fan PWM gate drive for phase U low side Fan PWM gate drive for phase U high side, up I/O Discrete programmable I/O or Non Maskable I/O I/O I/O IRMCF312 Description Crystal input Crystal output input output 2 order to boot from I C EEPROM Discrete programmable I/O Discrete programmable I/O Discrete programmable I/O 1 ...
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... I Analog input channel 2, 0-1.2V range, needs Analog input channel 2, 0-1.2V range, needs Analog input channel 2, 0-1.2V range, needs Analog input channel 2, 0-1.2V range, needs to be IRMCF312 Description Discrete programmable I/O Discrete programmable I/O (PWM) (PWM) 1.8V digital power Digital common Digital common 3.3 V digital power OP amp output Analog power (1 ...
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... I/O Discrete programmable I/O or analog output 2 I/O Discrete programmable I/O or external interrupt 0 I/O Discrete programmable I/O or external interrupt 1 I/O Discrete programmable I/O or Timer/Counter 0 IRMCF312 Description pulled down to AVSS if unused 1.8 V digital power Digital common 3.3V digital power configurable either high or low true configurable either high or low true configurable either high or low true ...
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... Discrete programmable I/O or JTAG test data input I I Test mode. Must be tied to VSS. Factory use only down I/O Reset, low true, Schmitt trigger input Table 22. Pin List IRMCF312 Description input nd UART receive input nd UART transmit output Digital common Digital common 3.3V digital power ...
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... Package Dimensions IRMCF312 34 ...
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... IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 www.irf.com IRMCF312 YWWP XXXXXX Order Information This product has been designed and qualified for the industrial level Qualification standards can be found at Data and specifications subject to change without notice. 12/05/2006 IRMCF312 IR Logo Production Lot The LQFP-100 is MSL3 qualified www.irf.com <http://www.irf.com> 35 ...