TLE 6251G Infineon Technologies, TLE 6251G Datasheet - Page 5

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TLE 6251G

Manufacturer Part Number
TLE 6251G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 6251G

Packages
P-DSO-14
Transmission Ratemax
1.0 Mbit/s
Quiescent Current (max.)
< 30 µA @ 5V standby
Bus Wake-up Capability
Yes
Additional Features
NSTB, WK, EN, NERR, INH, Vio
Wake-up Inputs
Bus wake-up + wake-up pin
Pin Configuration
Figure 1
Table 1
Pin No.
1
2
3
4
5
6
7
8
9
Final Data Sheet
Symbol
TxD
GND
V
RxD
V
EN
INH
NERR
WK
CC
µC
Pin Configuration (top view)
Pin Definitions and Functions
GND
RxD
TxD
INH
V
V
EN
Function
CAN transmit data input; 20 kΩ pull-up, LOW in dominant state
Ground
5 V supply input; block to GND with 100 nF ceramic capacitor
CAN receive data output; LOW in dominant state, push-pull output
stage
Logic voltage level adapter input; connect to pin
microcontroller, connect to additional supply voltage for other logic
voltage levels, block to GND with 100 nF ceramic capacitor
Mode control input 1; internal pull-down, see
Control output; set HIGH to activate voltage regulator; open drain
Diagnosis output 1; error and power on indication output, push-pull
output stage
Wake-up input; bi-level sensitive
CC
µC
1
2
3
4
5
6
7
(P-DSO-14-13)
TLE 6251 G
AEP03398.VSD
5
14
13
12
11
10
9
8
NSTB
CANH
CANL
SPLIT
V
WK
NERR
S
Figure 6
V
CC
Rev. 3.3, 2008-06-19
for 5 V
TLE 6251 G

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