IFX 1054G Infineon Technologies, IFX 1054G Datasheet - Page 7

• Manufacturer Part Number: IFX 1054G
• Manufacturer: Infineon Technologies

Specifications of IFX 1054G

• Packages: PG-DSO-14
• Transmission Ratemax: 125.0 kbit/s
• Bus Wake-up Capability: Yes
• Additional Features: INH, NERR, NSTB, ENT, WK, RTL, RTH
• Wake-up Inputs: Bus wake-up + wake-up pin
• Standards: ISO11898-3

3
3.1
Figure 4
3.2
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Data Sheet
Symbol
INH
TxD
RxD
NERR
NSTB
ENT
WK
RTH
RTL
V
CANH
CANL
GND
V
CC
S
Pin Configuration
Pin Assignment
Pin Configuration
Pin Definitions and Functions
Function
Inhibit output; for controlling an external voltage regulator
Transmit data input; integrated pull - up, LOW: bus becomes dominant, HIGH: bus
becomes recessive
Receive data output; integrated pull - up, LOW: bus is dominant, HIGH: bus is recessive
Error flag output; integrated pull - up, LOW: bus error (in Normal operation mode),
further functions see
Not stand-by input; digital control input to select operation modes, see
Enable transfer input; digital control input to select operation modes, see
Wake - Up input; if level of V
power mode by switching the RxD output LOW and switching the INH output HIGH (in
Sleep mode), see
Termination resistor output; connected to CANH bus-line via termination resistor
(500 Ω < R
Termination resistor output; connected to CANL bus-line via termination resistor
(500 Ω < R
Supply voltage input; +5 V, block to GND directly at the IC with ceramic capacitor
CAN bus line H; HIGH: dominant state
CAN bus line L; LOW: dominant state
Ground
Voltage supply input; block to GND directly at the IC with ceramic capacitor
RTH
RTL
< 16 kΩ), controlled by internal failure and mode management
< 16 kΩ), controlled by internal failure management
Table 1
Table 1
WAKE
7
changes the device indicates a Wake - up from low
Rev. 1.0, 2009-05-12
Pin Configuration
Figure 3
Figure 3
IFX1054G