LTC6946 Linear Technology Corporation, LTC6946 Datasheet

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LTC6946

Manufacturer Part Number
LTC6946
Description
Manufacturer
Linear Technology Corporation
Datasheet

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LTC6946EUFD-3#PBF
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Part Number:
LTC6946IUFD-1
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FEATURES
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
PLLWizard is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
3.3V
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TYPICAL APPLICATION
+
Low Noise Integer-N PLL with Integrated VCO
–226dBc/Hz Normalized In-Band Phase Noise Floor
–274dBc/Hz Normalized In-Band 1/f Noise
–157dBc/Hz Wideband Output Phase Noise Floor
Excellent Spurious Performance
Output Divider (1 to 6, 50% Duty Cycle)
Output Buffer Muting
Low Noise Reference Buffer
Charge Pump Current Adjustable from 250μA to
11.2mA
Configurable Status Output
SPI Compatible Serial Port Control
PLLWizard™ Software Design Tool Support
Wireless Base Stations (LTE, WiMAX, W-CDMA, PCS)
Broadband Wireless Access
Military and Secure Radio
Test and Measurement
10MHz
15Ω
0.01μF
0.01μF
51.1Ω
470pF
5V
470pF
3.3V
0.01μF
GND
V
CP
V
REF
REF
CP +
REF +
+
5.7GHz Wideband Receiver
0.1μF
2.2μF
LTC6946-3
SPI BUS
MUTE
V
GND
RF
RF
97.6Ω
RF
4.7nF
BB
+
+
0.1μF
57nF
0.01μF
3.3V
1μF
UNUSED OUTPUT
68nH
3.3V
FOR OTHER USE
0.01μF
100pF
IS AVAILABLE
Synthesizer with Integrated VCO
50Ω
68nH
100pF
3.3V
6946 TA01a
RF INPUT
0.37GHz to 5.7GHz Integer-N
SIGNAL
LO IF
RF
Ultralow Noise and Spurious
DESCRIPTION
The LTC
phase-locked loop (PLL) with a fully integrated VCO,
including a reference divider, phase-frequency detector
(PFD) with phase-lock indicator, ultralow noise charge
pump, integer feedback divider, and VCO output divider.
The charge pump contains selectable high and low voltage
clamps useful for VCO monitoring.
The integrated low noise VCO uses no external components.
It is internally calibrated to the correct output frequency
with no external system support.
The part features a buffered, programmable VCO output
divider with a range of 1 through 6, providing a wide
frequency range.
Frequency Coverage Options
VCO Frequency (GHz) 2.240 to 3.740 3.080 to 4.910 3.840 to 5.790
O DIV = 1
O DIV = 2
0 DIV = 3
O DIV = 4
O DIV = 5
O DIV = 6
TO IF
PROCESSING
®
6946 is a high performance, low noise, 5.7GHz
2.240 to 3.740 3.080 to 4.910 3.840 to 5.790
1.120 to 1.870 1.540 to 2.455 1.920 to 2.895
0.747 to 1.247 1.027 to 1.637 1.280 to 1.930
0.560 to 0.935 0.770 to 1.228 0.960 to 1.448
0.448 to 0.748 0.616 to 0.982 0.768 to 1.158
0.373 to 0.623 0.513 to 0.818 0.640 to 0.965
LTC6946-1
–100
–110
–120
–130
–140
–150
–160
–80
–90
100
LTC6946-3 PLL Phase Noise
RMS NOISE = 0.61°
RMS JITTER = 296fs
f
f
BW = 85kHz
RF
PFD
= 5.7GHz
= 10MHz
1k
OFFSET FREQUENCY (Hz)
10k
LTC6946-2
100k
LTC6946
1M
10M 40M
6946 TA01b
LTC6946-3
1
6946f

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LTC6946 Summary of contents

Page 1

... LTC6946-3 PLL Phase Noise –80 –90 –100 –110 –120 – ...

Page 2

... LTC6946IUFD-1#TRPBF LTC6946IUFD-2#PBF LTC6946IUFD-2#TRPBF LTC6946IUFD-3#PBF LTC6946IUFD-3#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: For more information on tape and reel specifications, go to: ...

Page 3

... Differential Differential f = 10MHz 50Ω REFO LOAD LTC6946-1 (Note 3) LTC6946-2 (Note 3) LTC6946-3 (Note 3) LTC6946-1 (Notes 3, 4) LTC6946-2 (Notes 3, 4) LTC6946-3 (Notes 3, 4) All Integers Included + Single Ended, Each Output RFO[1: 50Ω, LC Match Z RFO[1: 50Ω, LC Match Z RFO[1: 50Ω, LC Match ...

Page 4

... LTC6946 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T specified (Note 2). All voltages are with respect to GND. SYMBOL PARAMETER Output Current vs Output Voltage Sensitivity Output Current vs Temperature Output Hi-Z Leakage Current V Low Clamp Voltage CLMP(LO) V High Clamp Voltage CLMP(HI) V Mid-Supply Output Bias Ratio ...

Page 5

... Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC6946I is guaranteed functional within the case operating temperature range from –40°C to 105°C (θ JC Note 3: Valid for 1.60V ≤ TUNE ≤ 2.85V with part calibrated after a power cycle or software power-on-reset (POR) ...

Page 6

... OUTPUT VOLTAGE (V) 6946 G05 RF Output HD2 vs Output Divide – (Single Ended –20 LTC6946- VCO L = 68nH 100pF C S – – – – –45 –50 5 5.5 6 3.75 4.00 4 ...

Page 7

... PFD CALIBRATIION f = 125kHz CAL TIME 2. 40kHz 100MHz STEP 2.75 2.70 2.65 CPCHI, CPCLO = 0 2.60 CPCHI, CPCLO = 1 2. 100 150 200 TIME (μs) LTC6946-3 VCO Tuning Sensitivity 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 3500 4000 4500 5000 5500 6000 FREQUENCY (MHz) LTC6946-3 VCO Phase Noise – 5GHz VCO RF –50 –60 – ...

Page 8

... 250kHz PFD –150 f = 50kHz STEP NOTE 11 –160 100 1k 10k 100k 1M OFFSET FREQUENCY (Hz) , LTC6946-3 VCO Phase Noise vs f VCO Output Divide (f OFFSET – VCO – – – – –95 3800 ...

Page 9

... The outputs are open collector, with 136Ω (typical) pull-up resistors tied to V matching. If used single ended, the unused output should be terminated to 50Ω. See the Applications Information section for more details on impedance matching. LTC6946 LTC6946-3 Spurious Response f = 5700MHz 100MHz, RF REF ...

Page 10

... LTC6946 PIN FUNCTIONS + V (Pin 13): 3.15V to 3.45V Positive Supply Pin for RF RF Circuitry. This pin should be bypassed directly to the ground plane using a 0.01μF ceramic capacitor as close to the pin as possible. BB (Pin 14): RF Reference Bypass. This output must be bypassed with a 1.0μF ceramic capacitor to GND. Do not couple this pin to any other signal ...

Page 11

... OPERATION The LTC6946 is a high performance PLL complete with a low noise VCO available in three different frequency range options. The output frequency range may be further extended by utilizing the output divider (see Available Op- tions table, for more details). The device is able to achieve ...

Page 12

... LTC6946 OPERATION The BST bit should be set based upon the input signal level to prevent the reference input buffer from saturating. See Table 2 for recommended settings and the Applications Information section for programming examples. Table 1. FILT[1:0] Programming FILT[1: Table 2. BST Programming ...

Page 13

... See Figure 4 LWW amp. A passive loop filter as shown in Figure 14 requires CPINV = 0. UP CPUP DOWN CPDN Figure 5. Simplified Charge Pump Schematic 6946 F04 LTC6946 may be set from 250μ can result in lower in-band noise due 250μA 1 350μA 2 500μ ...

Page 14

... Available Options table, for more details). The wide frequency range of the VCO, coupled with the output divider capability, allows the DESCRIPTION LTC6946 to cover an extremely wide range of continuously selectable frequencies. Force Sink Current VCO Calibration Invert PFD Phase ...

Page 15

... See Figure 6 for circuit details and the Applications Infor- mation section for matching guidelines. The buffer may be muted with either the OMUTE bit, found in register h02 forcing the MUTE input low. 9 Figure 6. Simplified RF Interface Schematic , and f PFD VCO RF LTC6946 , f REF PFD + . RF P (Differential) P (Single Ended – ...

Page 16

... SDO. Readback may be multidrop (more than one LTC6946 connected in parallel on the serial bus), as SDO is three-stated (Hi-Z) when when data is not being read from the part. If the LTC6946 is not used in a multidrop configuration the serial port master is not capable of setting the SDO line level between read ...

Page 17

... Figure 13. The first byte of the burst sent from the serial bus master on SDI contains the destination reg- ister address (Addr0) and an LSB of “1” indicating a read. Once the LTC6946 detects a read burst, it takes SDO out of the Hi-Z condition and sends data bytes sequentially, 7-BIT REGISTER ADDRESS ...

Page 18

... Hi-Z Byte 0 Figure 13. Serial Port Auto-Increment Read Serial Port Registers The memory map of the LTC6946 may be found in Table 10, with detailed bit descriptions found in Table 11. The register address shown in hexadecimal format under the ADDR column is used to specify each register. Each register is denoted as either read-only (R) or read-write (R/W). The register’ ...

Page 19

... Block Power-Down Control The LTC6946’s power-down control bits are located in 1 register h02, described in Table 11. Different portions of h00FA the device may be powered down independently. Care must h1 be taken with the LSB of the register, the POR (power-on 1 reset) bit. When written to a “ ...

Page 20

... RF . The PFD, charge pump, N divider, and external VCO and loop filter form a feedback loop to accurately control the output frequency (see Figure 14). The R and O divider are used to set the output frequency resolution. LTC6946 ± REF PFD ...

Page 21

... Status Output Programming This example will use the STAT pin to alert the system whenever the LTC6946 generates a fault condition. Pro- gram x[5], x[4], x[3], x[1], x[ force the STAT pin high whenever any of the UNLOCK, ALCHI, ALCLO, THI or TLO flags asserts: ...

Page 22

... ALCCAL = 1) and the lock enable bit (LKEN = 1) at the same time: Reg07 = h63 The LTC6946 will now calibrate its VCO. The ALC will only be active during the calibration cycle, but the ALCHI and ALCLO status conditions will be monitored. Reference Input Settings and Output Divider Programming From Table 1, FILT = 1 for a 20MHz reference frequency ...

Page 23

... OUTPUT PHASE NOISE DUE TO 1/f NOISE In-band phase noise at very low offset frequencies may be influenced by the LTC6946’s 1/f noise, depending upon f . Use the normalized in-band 1/f noise of –274dBc/ PFD Hz with Equation 13 to approximate the output 1/f phase ...

Page 24

... C inductor selected for maximum Q factor and SRF , such as the Coilcraft HP series of chip inductors. ± The LTC6946’s differential RF outputs may be combined using an external balun to drive a single-ended load. The advantages are approximately 3dB more output power than each output individually and better 2nd order harmonic performance ...

Page 25

... TO 50Ω LOAD modulates the VCO frequency. However, improper PCB layout can degrade the LTC6946’s PRI inherent spurious performance. Care must be taken to prevent the reference signal f VCO’s tune line, or into other loop filter signals. Example 6946 F19 suggestions are the following ...

Page 26

... LTC5588-1 V CC1 BBPI I-DAC BBMI 0° 90° BBPQ Q-DAC BBMQ BASEBAND 140MHz GND GENERATOR 26 LTC6946-2 Driving a Modulator 3.3V 0.01μF 1μF 15Ω 0.01μF 5V 0.01μF VCO + V GND CM A 2.2μ LTC6946 GND TB TUNE 1μF ...

Page 27

... UFD Package 28-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev B) 0.70 0.05 3.65 0.05 PACKAGE OUTLINE 3.50 REF 4.10 0.05 5.50 0.05 0.75 0.05 4.00 0.10 (2 SIDES) 3.50 REF 0.200 REF 0.00 – 0.05 LTC6946 PIN 1 NOTCH 2.50 REF R = 0. 0.115 45 CHAMFER TYP TYP 27 28 0.40 0. 3.65 0.10 2.65 0.10 (UFD28) QFN 0506 REV B ...

Page 28

... LTC5569 Broadband Dual Mixer LTC5588-1 Ultrahigh OIP3 I/Q Modulator ® LT 5575 Direct Conversion I/Q Demodulator Linear Technology Corporation 28 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 ● LTC6946-2 Driving a Passive Downconverting Mixer 3.3V 0.01μF 1μF 15Ω 0.01μF 5V 0.01μF VCO + V GND CM A 2.2μF ...

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