W29C020 Winbond, W29C020 Datasheet

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W29C020

Manufacturer Part Number
W29C020
Description
Manufacturer
Winbond
Datasheet

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GENERAL DESCRIPTION
The W29C020 is a 2-megabit, 5-volt only CMOS flash memory organized as 256K
device can be written (erased and programmed) in-system with a standard 5V power supply. A 12-volt
V
operations with extremely low current consumption compared to other comparable 5-volt flash
memory products. The device can also be written (erased and programmed) by using standard
EPROM programmers.
FEATURES
PP
Single 5-volt write (erase and program)
operations
Fast page-write operations
Fast chip-erase operation: 50 mS
Two 8 KB boot blocks with lockout
Typical page write (erase/program) cycles:
100/1K/10K
Read access time: 70/90/120 nS
Ten-year data retention
128 bytes per page
Page write (erase/program) cycle: 10 mS
(max.)
Effective byte-write (erase/program) cycle
time: 39 S
Optional software-protected data write
is not required. The unique cell architecture of the W29C020 results in fast write (erase/program)
256K
- 1 -
8 CMOS FLASH MEMORY
Software and hardware data protection
Low power consumption
Automatic write (erase/program) timing with
internal V
End of write (erase/program) detection
Latched address and data
All inputs and outputs directly TTL compatible
JEDEC standard byte-wide pinouts
Available packages: 32-pin 600 mil DIP, 450 mil
SOP, TSOP, and 32-pin PLCC
Active current: 25 mA (typ.)
Standby current: 20 A (typ.)
Toggle bit
Data polling
Publication Release Date: February 1998
PP
generation
W29C020
8 bits. The
Revision A3

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W29C020 Summary of contents

Page 1

... The W29C020 is a 2-megabit, 5-volt only CMOS flash memory organized as 256K device can be written (erased and programmed) in-system with a standard 5V power supply. A 12-volt V is not required. The unique cell architecture of the W29C020 results in fast write (erase/program) PP operations with extremely low current consumption compared to other comparable 5-volt flash memory products ...

Page 2

... DQ1 WE DQ0 GND W29C020 DQ0 . OUTPUT CONTROL . BUFFER DQ7 8K Byte Boot Block (Optional) CORE DECODER ARRAY 8K Byte Boot Block (Optional) PIN NAME Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply ...

Page 3

... FUNCTIONAL DESCRIPTION Read Mode The read operation of the W29C020 is controlled by CE and OE , both of which have to be low for the host to obtain data from the outputs used for device selection. When CE is high, the chip is de-selected and only standby power will be consumed the output control and is used to gate data from the output pins ...

Page 4

... The W29C020 includes a data polling feature to indicate the end of a write cycle. When the W29C020 is in the internal write cycle, any attempt to read DQ7 from the last byte loaded during the page/byte-load cycle will receive the complement of the true data. Once the write cycle is completed. ...

Page 5

... Toggle Bit (DQ6)- Write Status Detection In addition to data polling, the W29C020 provides another method for determining the end of a write cycle. During the internal write cycle, any consecutive attempts to read DQ6 will produce alternating 0's and 1's. When the write cycle is completed, this toggling between 0's and 1's will stop. The device is then ready for the next operation ...

Page 6

... Load data AA to address 5555 Load data 55 to address 2AAA Load data A0 to address 5555 Sequentially load up to 128 bytes of page data Pause 10 mS Exit - 6 - W29C020 TO DISABLE PROTECTION ADDRESS DATA 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H ...

Page 7

... Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 to address 2AAA Load data 10 to address 5555 Pause 50 mS Exit Publication Release Date: February 1998 - 7 - W29C020 DATA AAH 55H 80H AAH 55H 10H Revision A3 ...

Page 8

... Read address = 00000 data = DA (2) Read address = 00001 data = 45 (4) Read address = 00002 data = FF/FE (5) Read address = 3FFF2 data = FF/FE ; device code is read for W29C020 SOFTWARE PRODUCT IDENTIFICATION/BOOT BLOCK LOCKOUT DETECTION EXIT ADDRESS DATA 5555H AAH 2AAAH 55H 5555H F0H - - - - ...

Page 9

... Load data address 5555 address 5555 Load data 00 Load data address 00000 address 3FFFF Pause 10 mS Pause W29C020 BOOT BLOCK LOCKOUT FEATURE SET ON LAST 8K ADDRESS BOOT BLOCK ADDRESS DATA 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH ...

Page 10

... Other inputs = -0.3V, all DQs DD open V = GND GND 2 -400 A OH1 -100 4.5V OH2 W29C020 RATING -0 +70 -65 to +150 -0 +1 +1.0 DD -0.5 to 12.5 LIMITS MIN. TYP. MAX 100 - - ...

Page 11

... D OUT 100 pF for 90/120 nS 1. for 70 nS (Including Jig and Scope) Input Output 3V 1.5V 1.5V 0V Test Point Test Point Publication Release Date: February 1998 - 11 - W29C020 TYPICAL UNIT 100 MAX. UNIT CONDITIONS = 100 pF for 90/120 for ...

Page 12

... Byte Load Cycle Time Note: All AC timing signals observe the following guideline for determining setup and hold times: Reference level is V for high-level signal and 5.0V 5% for SYM. W29C020-70 W29C020-90 W29C020-12 MIN. MAX. MIN ...

Page 13

... T 10 OEH (1) SYMBOL MIN OEH 150 OEHP Data Valid - 13 - W29C020 TYP. MAX TYP. MAX OHZ T CHZ High-Z Data Valid T AA Publication Release Date: February 1998 Revision A3 UNIT UNIT ...

Page 14

... CE Controlled Write Cycle Timing Diagram Address A17 High Z DQ7 OES Data Valid OES T OEH Data Valid W29C020 OEH T WPH T DH Internal write starts WPH DH Internal Write Starts ...

Page 15

... Page Write Cycle Timing Diagram Address A17-0 DQ7 Polling Timing Diagram Address A15 DQ7 T BLC T WPH T WP Byte 0 Byte 1 Byte 2 T OEH T DH HIGH W29C020 T WC Byte N-1 Byte N Internal Write Start T WR Publication Release Date: February 1998 Revision A3 ...

Page 16

... Address A15-0 5555 DQ7 SW0 OEH T OE HIGH-Z Byte/page load Three-byte sequence for cycle starts software data protection mode 2AAA 5555 BLC T WPH SW1 SW2 Word W29C020 Word N Word N-1 (last word) Internal write starts ...

Page 17

... Six-byte code for 5V-only software chip erase 5555 5555 2AAA 5555 2AAA BLC T WPH SW0 SW2 SW3 SW1 SW4 - 17 - W29C020 T WC 5555 20 SW5 Internal programming starts T WC 5555 10 SW5 Internal erasing starts Publication Release Date: February 1998 Revision A3 ...

Page 18

... W29C020-12 120 W29C020S-70 70 W29C020S-90 90 W29C020S-12 120 W29C020T-70 70 W29C020T-90 90 W29C020T-12 120 W29C020P-70 70 W29C020P-90 90 W29C020P-12 120 W29C020-70B 70 W29C020-90B 90 W29C020-12B 120 W29C020S-70B 70 W29C020S-90B 90 W29C020S-12B 120 W29C020T-70B 70 W29C020T-90B 90 W29C020T-12B 120 W29C020P-70B 70 W29C020P-90B 90 W29C020P-12B 120 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. ...

Page 19

... Base Plane Seating Plane Detail See Detail W29C020 Dimension in mm Dimension in inches Symbol Min. Nom. Max. Min. Nom. Max. 5.33 A 0.210 0.010 0. 0.150 0.155 0.160 3.81 3.94 4. 0.016 0.018 0.022 ...

Page 20

... TSOP 0.10(0.004 W29C020 Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.140 3.56 A 0.020 0. 0.105 0.110 0.115 2.67 2.80 2. 0.026 0.032 0.66 0.81 0.028 0. ...

Page 21

... Winbond Memory Lab. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Winbond Microelectronics Corp. Kowloon, Hong Kong Winbond Systems Lab. TEL: 852-27513100 2727 N. First Street, San Jose, FAX: 852-27552064 CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798 Publication Release Date: February 1998 - 21 - W29C020 Revision A3 ...

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