IDT70V27S25PF Integrated Device Technology, Inc., IDT70V27S25PF Datasheet

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IDT70V27S25PF

Manufacturer Part Number
IDT70V27S25PF
Description
Manufacturer
Integrated Device Technology, Inc.
Datasheet

Specifications of IDT70V27S25PF

Dc
00+

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70V27S25PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70V27S25PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
©2000 Integrated Device Technology, Inc.
NOTES:
1) BUSY is an input as a Slave (M/S=V
2) BUSY and INT are non-tri-state totem-pole outputs (push-pull).
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Industrial: 35ns (max.)
– Commercial: 15/20/25/35/55ns (max.)
Low-power operation
– IDT70V27S
– IDT70V27L
Separate upper-byte and lower-byte control for bus
matching capability
Dual chip enables allow for depth expansion without
external logic
Active: 500mW (typ.)
Standby: 3.3mW (typ.)
Active: 500mW (typ.)
Standby: 660 W (typ.)
I/O
BUSY
I/O
SEM
R/
CE
CE
8-15L
A
INT
OE
0-7L
UB
A
LB
14L
W
0L
0L
1L
L
L
L
L
L
L
L
(2)
(1,2)
IL
) and an output as a Master (M/S=V
Address
Decoder
R/
CE
CE
A
OE
A
14L
W
0L
0L
1L
L
L
HIGH-SPEED 3.3V
32K x 16 DUAL-PORT
STATIC RAM
Control
I/O
ARBITRATION
SEMAPHORE
INTERRUPT
MEMORY
ARRAY
IH
32Kx16
70V27
LOGIC
).
6.01
M/
1
S
(2)
IDT70V27 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = V
M/S = V
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
LVTTL-compatible, single 3.3V (±0.3V) power supply
Available in 100-pin Thin Quad Flatpack (TQFP), 108-pin
Ceramic Pin Grid Array (PGA), and 144-pin Fine Pitch BGA
(fpBGA)
for selected speeds
Industrial temperature range (-40°C to +85°C) is available
Control
I/O
IH
IL
for BUSY input on Slave
for BUSY output flag on Master,
Decoder
Address
A
A
CE
CE
OE
R/
14R
0R
W
0R
R
1R
R
3603 drw 01
IDT70V27S/L
R/W
UB
CE
CE
OE
LB
BUSY
A
A
SEM
INT
I/O
I/O
14R
0R
R
R
0R
R
1R
8-15R
0-7R
R
R
R
(2)
R
(1,2)
DSC 3603/7

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IDT70V27S25PF Summary of contents

Page 1

... NOTES: 1) BUSY is an input as a Slave (M/S=V ) and an output as a Master (M/S BUSY and INT are non-tri-state totem-pole outputs (push-pull). ©2000 Integrated Device Technology, Inc. HIGH-SPEED 3.3V 32K x 16 DUAL-PORT STATIC RAM IDT70V27 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than ...

Page 2

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM The IDT70V27 is a high-speed 32K x 16 Dual-Port Static RAM, designed to be used as a stand-alone 512K-bit Dual-Port RAM combination MASTER/SLAVE Dual-Port RAM for 32-bit ...

Page 3

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM 10L 14L ...

Page 4

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM 10R 11R ...

Page 5

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM < 0. >V -0. NOTES: 1. Chip Enable references are shown above with the actual CE 2. Port ...

Page 6

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Symbol Rating (2) V Terminal Voltage TERM with Respect to GND Temperature T BIAS Under Bias T Storage STG Temperature DC Output I OUT Current NOTES: 1. Stresses greater than ...

Page 7

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Symbol Parameter Dynamic Operating CC SEM = V Current (Both Ports Active MAX Standby Current SB1 L SEM = ...

Page 8

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Symbol Parameter Dynamic Operating Current CC SEM = V (Both Ports Active MAX CE I Standby Current SB1 L SEM (Bo th Ports ...

Page 9

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Symbol READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ACE (3) t Byte Enable Access Time ABE t Output Enable ...

Page 10

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM ADDR ( UB, LB R/W DATA OUT BUSY OUT ( NOTES: 1. Timing depends on which signal is asserted last: CE, OE, LB, ...

Page 11

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Symbol WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW (3) t Address Set-up Time AS t Write Pulse ...

Page 12

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM ADDRESS OE (9,10 SEM ( ( R/W (4) DATA OUT DATA IN ADDRESS (9,10 SEM ( ( ...

Page 13

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM VALID ADDRESS t AW SEM I R/W OE Write Cycle NOTES and for the duration ...

Page 14

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Symbol BUSY TIMING (M/S BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Access Time from Chip Enable Low ...

Page 15

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES ensure that the earlier of the two ports wins. t ...

Page 16

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM BUSY ADDR "A" and "B" CE "A" (2) t APS CE "B" BUSY "B" BUSY S ADDR "A" t APS ADDR "B" BUSY "B" NOTES: 1. All timing is the ...

Page 17

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM ADDR "A" ( "A" R/W "A" INT "B" ADDR "B" ( "B" OE "B" t INT "B" NOTES: 1. All timing is the same ...

Page 18

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM Inputs Outputs 14L CE CE BUSY ( 14R MATCH MATCH MATCH H ...

Page 19

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM the other side is completed write operation has been attempted from the side that receives a BUSY indication, the write signal is gated internally to prevent the write ...

Page 20

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM a one to that latch. The eight semaphore flags reside within the IDT70V27 in a separate memory space from the Dual-Port RAM. This address space is accessed by placing a ...

Page 21

IDT 70V27S/L High-Speed 3.3V 32K x 16 Dual-Port Static RAM IDT XXXXX A 999 Device Power Speed Type NOTE: 1. Industrial temperature range is available on selected TQFP packages in low power. For other speeds, packages and powers contact your ...

Page 22

... Page 7 and8 DC Electrical parameters–changed wording from "open" to "disabled" Removed Preliminary status CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Commercial and Industrial Temperature Range for SALES: for Tech Support: 800-345-7015 or 408-727-5116 ...

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