11257-801 AMI Semiconductor, Inc., 11257-801 Datasheet
11257-801
Related parts for 11257-801
11257-801 Summary of contents
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January 1999 1.0 Features Generates up to eighteen low-skew, non-inverting clocks from one clock input Supports up to four SDRAM DIMMs 2 Uses either I C -bus or SMBus serial interface with Read and Write capability for individual clock output ...
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Table 1: Pin Descriptions Key Analog Input Analog Output Digital Input Digital Output Power/Ground Active Low pin PIN PIN PIN (FS6050) (FS6051) (FS6053 ...
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January 1999 3.1 Power-Up Initialization All outputs are enabled and active upon power-up, and all output control register bits are initialized to one. The outputs must be configured at power-up and are not expected to be configured during normal operation. ...
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Table 4: Byte 0 - SDRAM Control Register 0 REGISTER CLOCK DESCRIPTION BIT OUTPUT 7 SDRAM_7 On (1) / Off (0) 6 SDRAM_6 On (1) / Off (0) 5 SDRAM_5 On (1) / Off (0) 4 SDRAM_4 On (1) / ...
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January 1999 4.0 Dual Serial Interface Control This integrated circuit is a read/write slave device that 2 supports both the Inter IC Bus (I C-bus) and the System Management Bus (SMBus) two-wire serial interface pro- tocols. The unique device address ...
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For an I C-bus interface, the device can support two de- vice addresses to permit multiple devices on one I The A2 address bit is ignored and can be set to either a one or a zero. 2 Therefore, ...
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January 1999 Figure 7: Random Register Write Procedure (I S DEVICE ADDRESS W A REGISTER ADDRESS 7-bit Receive Register Address Device Address Acknowledge START WRITE Command Command From bus host to device Figure 8: Random Register Read Procedure (I S ...
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SMBus: Block Write The Block Write command permits the SMBus master to write several bytes of data to sequential registers, starting by default at Register 0. The Block Write command, as noted in Figure 11, begins with the seven-bit ...
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January 1999 5.0 Electrical Specifications Table 7: Absolute Maximum Ratings Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these ...
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Table 9: DC Electrical Specifications Unless otherwise stated, all power supplies = 3.3V ± 5%, no load on any output, and ambient temperature range T characterization data and are not currently production tested to any specific limits. MIN and MAX ...
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January 1999 Table 10: AC Timing Specifications Unless otherwise stated, all power supplies = 3.3V ± 5%, no load on any output, and ambient temperature range T characterization data and are not currently production tested to any specific limits. MIN ...
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Table 11: Serial Interface Timing Specifications Unless otherwise stated, all power supplies = 3.3V ± 5%, no load on any output, and ambient temperature range T characterization data and are not currently production tested to any specific limits. MIN and ...
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January 1999 Figure 15: SDRAM_0:17 Clock Output (3.3V Type 4 Clock Buffer) Low Drive Current (mA) Voltage (V) MIN. TYP. MAX 104 ...
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Package Information Table 12: 48-pin SSOP (7.5mm/0.300") Package Dimensions DIMENSIONS INCHES MILLIMETERS MIN. MAX. MIN. MAX. A 0.095 0.110 2.41 2.79 A 0.008 0.016 0.203 0.406 1 A 0.088 0.092 2.24 2. 0.008 0.0135 0.203 0.343 C ...
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January 1999 Table 14: 28-pin SOIC (7.5mm/0.300") Package Dimensions DIMENSIONS INCHES MILLIMETERS MIN. MAX. MIN. MAX. A 0.093 0.104 2.35 2.65 A 0.004 0.012 0.10 0. 0.08 0.100 2.05 2. 0.013 0.013 0.33 0.51 C 0.009 ...
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Table 16: 28-pin SSOP (5.3mm/0.209") Package Dimensions DIMENSIONS INCHES MILLIMETERS MIN. MAX. MIN. MAX. A 0.068 0.078 1.73 2.00 A 0.002 0.008 0.05 0. 0.066 0.07 1.68 1. 0.01 0.015 0.25 0.38 C 0.005 0.008 0.13 ...
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January 1999 Table 18: 32-pin SOIC (7.5mm/0.300") Package Dimensions DIMENSIONS INCHES MILLIMETERS MIN. MAX. MIN. MAX. A 0.090 0.100 2.29 2.54 A 0.004 0.010 0.10 0. 0.086 0.090 2.18 2. 0.014 0.020 0.36 0.51 C 0.006 ...
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... Ordering Information DEVICE ORDERING CODE FONT NUMBER 11257-801 FS6050 11257-811 FS6050 11257-802 FS6051 11257-812 FS6051 11257-806 FS6051 11257-816 FS6051 11257-803 FS6053 11257-813 FS6053 11257-804 FS6054 11257-814 FS6054 11257-805 FS6057 11257-815 FS6057 2 Purchase components of American Microsystems, Inc., or one of its sublicensed Associated Companies conveys ...
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January 1999 8.0 Application Information 8.1 Reduction of EMI The primary concern when designing the board layout for this device is the reduction of electromagnetic interfer- ence (EMI) generated by the 18 copies of the 100MHz SDRAM clock ...
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Series termination adds no dc loading to the driver, and requires less power than other resistive termination methods. Further, no extra impedance exists from the signal line to a reference voltage, such as ground. As shown in Figure 20, the ...