T8531A/T8532 Agere Systems, Inc., T8531A/T8532 Datasheet - Page 32
T8531A/T8532
Manufacturer Part Number
T8531A/T8532
Description
Multichannel Programmable Codec Chip Set
Manufacturer
Agere Systems, Inc.
Datasheet
1.T8531AT8532.pdf
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Codec Chip Set
Timing Characteristics
Table 17. Serial Control Port Timing (See Figure 10.)
Notes:
UPDI and UPCS change at the rising edge of UPCK by the microprocessor and are sampled at the falling edge of UPCK by the DSP.
UPDO changes at the rising edge of UPCK by the DSP and is sampled at the falling edge of UPCK by the microprocessor.
32
UPDO
UPCK
UPCS
UPDI
tUPDOHZDL UPCS to UPDO High-Z
tCSLHHOD
tUPDODEL
tCSHLSET
tCKCSH1
tUPDIHD
tUPDIST
tCKCSH
Figure 10. Timing Diagram for Microprocessor Write/Read to/from the DSP on the Control Interface
Symbol
15
ADDRESS (16 bits)
HIGH-Z STATE
UPCS to UPCK Setup
UPCS to UPCK Hold
UPDI to UPCK Setup
UPDI to UPCK Hold
UPCK to UPDO Delay
Duration of UPCK and UPCS High:
Duration of UPCK and UPCS High
tCSHLSET
tUPDIST
Write Cycle
Read Cycle
tUPDIHD
14
13—2
Parameter
(continued)
1
0
tUPDODEL
Test Conditions
C
C
L
L
= 50 pF
= 50 pF
—
—
—
—
—
—
—
tCKCSH
15
DATA (16 bits)
DATA (16 bits)
15
tUPDIHD
14
20 ns
Min
14
25
25
20
—
—
1
9
9
tCSLHHOD
13—1
tUPDOHZDL
13—1
tCKCSH1
Typ
—
—
—
—
—
—
—
—
—
0
UPCK Period/2
0
Agere Systems Inc.
Max
42
34
—
—
—
—
—
—
May 2001
ADDRESS
5-4232a (F)
Unit
ns
—
ns
ns
ns
ns
s
s
s
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