MCC141511A Motorola / Freescale Semiconductor, MCC141511A Datasheet - Page 7

• Manufacturer Part Number: MCC141511A
• Description: LCD Segment Driver
• Manufacturer: Motorola / Freescale Semiconductor

V
tions. V
ground.
V
drivers and is connected to the Vout connection of the MC68HC05L10
MCU.
V
divider. See Figure 4.
D0 - D7
which are connected to D0 through D7 of the MC68HC05L10.
A0 - A9
display RAM and are connected to A0 through A9 of the
MC68HC05L10.
BPSYNC
for timing synchronization. BPSYNC is connected to FRM of
MC68HC05L10. See Figure 5.
BPCLK
provides the required frame frequency for the segment driver. It is con-
nected to BPCLK of the MC68HC05L10. Thus, the frequency is usually
2.048 kHz. See Figure 5.
PHI2
chronization. It is connected to P02 of MC68HC05L10.
SEG0 - SEG127
LCD panel. These outputs are forced to a low level while display is
turned off. Any unused segment outputs should be left open.
CE
CS1, CS2, CS3 or CS4 of the MC68HC05L10.
DD
LCD
SEGL
AND V
The main dc power is supplied to the part by these two connec-
This supply connection provides the voltage level for the segment
These inputs are connected to V2 and V3 of an external voltage
These connections form an eight bit wide bidirectional data bus
These inputs form a ten-bit wide address bus for addressing the
This input is a periodic active-low signal from the MC68HC05L10
This input may be run as high as 4.096 kHz (50% duty cycle). It
This input is a bus clock input that is used for data bus timing syn-
These 128 output lines provide the frontplane drive signals to the
This is an active low chip enable input and is connected to either
MOTOROLA
, V
DD
SEGH
is the most-positive supply level for logic circuitry and V
SS
PIN DESCRIPTIONS
SS
is
LRS
driver display. See Figure 8.
0 or Low = SEG 0 - 127
1 or High = SEG 127 - 0
MS
1:41 multiplex ratio is possible.
0 or Low = 1:32 multiplex addressing
1 or High = 1:41 multiplex addressing
R/W
the data bus. When R/W is low, the LCD driver reads data from the data
bus (D0-D7). When R/W is high, the LCD driver writes data to the data
bus (D0-D7). This input is connected to R/W of MC68HC05L10.
TEST
places the part in the normal mode of operation. This input has an on-
chip pulldown resistance of approximately 1M.
The left-right selection input defines the direction of the segment
This input selects how display RAM is addressed. Either a 1:32 or
This input indicates which direction the data is to be passed over
Allowing this connection to float or connecting it to VSS (GND)
Figure 4. External Voltage Divider
V3
V2
MC141511A
3–25