A3932SEQ-TTR Allegro MicroSystems, Inc., A3932SEQ-TTR Datasheet - Page 6

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A3932SEQ-TTR

Manufacturer Part Number
A3932SEQ-TTR
Description
IC MOSFET DRVR 5V DUAL HI/LO SIDE 3-PHASE BRDG 32PLCC T/R
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
FAULT = 1 (external pull-up) for any of the following:
1 – invalid HALL input code,
2 – undervoltage condition detected at VREG.
3 – thermal shutdown, or
4 – motor lead (SA/SB/SC) shorted to ground.
high-side drivers, faults will force a coast condition that turns
off all power MOSFETs. Only the short-to-ground fault is
latched but is cleared at each commutation. If the motor has
stalled due to a short-to-ground being detected, toggling the
RESET terminal or repeating a power-up sequence will clear
the fault. Typically pulled up to V
5.1 k resistor.
pulled up to V
= 1), only the high-side MOSFET is switched off during a
PWM-off cycle. The fast-decay mode (MODE = 0) switches
both the high-side and low-side MOSFETs.
(+5 V). Configured for 120 electrical spacing.
Truth Table. Internally pulled up to V
BRAKE = 0 will turn on the low-side FETs and turn off the
high-side FETs. This will effectively short-circuit the BEMF in
the windings and brake the motor. The braking torque applied
will depend on the speed. Internally pulled up to V
RESET = 1 overrides BRAKE and will coast the motor.
feature, forcing current decay through the body diodes of the
power MOSFETs. An SR = 1 will result in appropriate high-
and low-side gate outputs to switch in response to a PWM-off
command. Internally pulled up to V
Input Logic table.
proportional to speed of rotation. A pulse appears at every
HALL transition. Typically pulled up to V
external 5.1 k resistor.
3932
THREE-PHASE POWER
MOSFET CONTROLLER
— Synchronous rectification input. An SR = 0 disables this
Except for a short-to-ground fault that only turns off the
— A logic input to reverse rotation, see Commutation
— An open-drain digital output whose frequency is
— A logic input to set current-decay method, internally
— Open-drain output to indicate fault condition;
— An active-low logic input for a braking function. A
— Hall-sensor inputs; internally pulled up to V
LCAP
(+5 V). When in slow-decay mode (MODE
LCAP
LCAP
LCAP
(+5 V) with an external
(+5 V). See also the
LCAP
(+5 V).
(+5 V) with an
LCAP
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
(+5 V).
LCAP
(+5 V). A PWM = 0 turns off selected drivers. A PWM = 1
will turn on selected drivers as determined by H1/H2/H3 input
logic. Holding PWM = 1 allows speed/torque control solely by
the internal current-limit circuit with the REF analog voltage.
See also the Input Logic table
external resistor (R
controlled by the value of the external capacitor (see Applica-
tions Information). See Application Information.
A voltage representing load current appears on this terminal
during on time, when it reaches REF voltage, the comparator
trips and load current decays for the fixed off-time interval.
Voltage transients seen at this terminal when the drivers turn on
are ignored for time t
Voltage applied here with respect to AGND sets the peak load
current.
drive and bootstrap capacitor charge circuits. It is good practice
to connect a decoupling capacitor from this terminal to AGND,
as close to the device terminals as possible. This terminal
should be shorted to V
connect a decoupling capacitor from this terminal to AGND, as
close to the device terminals as possible.
internal 5 V reference. This terminal can source no more than
3 mA for the DEAD input, TACH and FAULT outputs.
LCAP is selected to adjust the turn-off to turn-on time. This
delay is needed to prevent shoot-through in the external power
MOSFETs. See Applications Information for details on setting
dead time.
be connected to the system power ground.
— An analog input used to set the fixed off time with an
— An analog input to the current-limit comparator.
— The A3932 supply voltage. It is good practice to
— Speed control input, internally pulled up to V
— Connection for 0.1 F decoupling capacitor for the
— A regulated 13 V output; supply for low-side gate
— An analog input. A resistor between DEAD and
— The return for all low-side gate drivers.
— The low-level (analog) reference point.
— An analog input to the current-limit comparator.
T
) and capacitor (C
blank
BB
I
.
peak
for 12 V applications.
= V
REF
/R
T
S
). The t
.
.
blank
This should
time is
LCAP

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