A3941 Allegro MicroSystems, Inc., A3941 Datasheet - Page 20

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A3941

Manufacturer Part Number
A3941
Description
Automotive Full Bridge MOSFET Driver
Manufacturer
Allegro MicroSystems, Inc.
Datasheet

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A3941
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
0.10
Copyright ©2008, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
0.25
C
+0.05
–0.06
28
1
A
2
B
9.70 ±0.10
5.00
Package LP 28-Pin TSSOP with Exposed Thermal Pad
0.65
For the latest version of this document, visit our website:
3.00
Automotive Full Bridge MOSFET Driver
0.10 MAX
4.40 ±0.10
1.20 MAX
SEATING
PLANE
www.allegromicro.com
6.40 ±0.20
C
A Terminal #1 mark area
B
C
For reference only
(reference JEDEC MO-153 AET)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Reference land pattern layout (reference IPC7351 SOP65P640X120-29CM);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
Exposed thermal pad (bottom surface)
GAUGE PLANE
0.25
4° ±4
SEATING PLANE
0.60 ±0.15
0.15
(1.00)
+0.05
–0.06
1.65
28
1
2
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
0.45
C
PCB Layout Reference View
5.00
0.65
3.00
20
6.10

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