A3985 Allegro MicroSystems, Inc., A3985 Datasheet
A3985
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A3985 Summary of contents
Page 1
... Digitally Programmable Dual Full-Bridge MOSFET Driver Description The A3985 is a flexible dual full-bridge gate driver suitable for driving a wide range of higher power industrial bipolar 2- phase stepper motors or 2-phase brushless dc motors. It can also be used to drive two individual torque motors or solenoid actuators. Motor power is provided by external N-channel power MOSFETs at supply voltages from ...
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... MOSFETs is provided by a bootstrap capacitor. Efficiency is enhanced by using synchronous rectification and the power FETs Selection Guide Part Number A3985SLD-T Tube, 50 pieces per tube A3985SLDTR-T Tape and reel, 4000 pieces per reel *Contact Allegro for additional packing options Absolute Maximum Ratings Characteristic Supply Voltage ...
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... A3985 +5 V VDD Bandgap V REF REF SDO SDI STR Serial Port SCK WC ENABLE V REF OSC Programmable Divider Oscillator Dual Full-Bridge MOSFET Driver Functional Block Diagram VBB Regulator Phase 1A High-Side Drive V REG 6-bit Low-Side DAC Drive Programmable PWM Timer Blanking Phase 1B Mixed Decay ...
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... A3985 ELECTRICAL CHARACTERISTICS at T Characteristics Supply and Reference Load Supply Voltage Range Load Supply Current Load Supply Idle Current Logic Supply Voltage Range Logic Supply Current Logic Supply Idle Current Regulator Output Bootstrap Diode Forward Voltage Gate Output Drive Turn-On Rise Time ...
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... A3985 ELECTRICAL CHARACTERISTICS, continued Characteristics Current Control Blank Time Fixed Off-Time Reference Input Voltage Internal Reference Voltage Current Trip Point Error 2 Reference Input Current 1 Internal Oscillator Frequency Maximum Clock Input Frequency Master Clock Frequency Protection VREG Undervoltage Lockout VREG Undervoltage Lockout ...
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... A3985 ELECTRICAL CHARACTERISTICS, continued Characteristics Serial Data Timing Serial Clock High Time Serial Clock Low Time Strobe Lead Time Strobe Lag Time Strobe High Time Data Out Enable Time Data Out Disable Time Data Out Valid Time from SCK Falling ...
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... These four options are selected by bits D12 and D13 of the Control register word. When the A3985 is configured to use an external clock, this is input on the OSC pin and will usually provide more precision than using the internal oscillator. The three internal divider alternatives provide flexibility in setting the master clock frequency based on available external system clocks ...
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... This provides a mechanism to avoid inadvertently changing the Control register settings by erroneous or corrupt serial data signals. Gate Drive The A3985 is designed to drive external power N-chan- nel MOSFETs. It supplies the transient currents necessary to quickly charge and discharge the external FET gate capacitance in order to reduce dissipation in the external FET during switching ...
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... When the phase current is rising, the motor back EMF does not affect the current control, and slow decay may be used to minimize the phase current ripple. The A3985 must be programmed to switch between slow decay, when the cur- rent is rising, and mixed decay, when the current is falling. ...
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... TripDAC Note that the number of bits clocked through the shift reg- ister is irrelevant and only the last 19 bits before STR goes high will be latched. This allows several A3985 devices to be daisy-chained and updated together with a single STR rising edge. Data Register (Word 0) Bit Assignments ...
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... A3985 to 0 disables Bridge 1, with all drivers off (see Internal PWM Current Control, in the Functional Description section). D7 – Bridge 1 Phase Controls the direction of output cur- rent for Bridge (load S1A – Bridge 1 Mode Determines whether slow decay is forced or mixed decay, according to Word 1 Bits D3 to D11, is allowed ...
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... A3985 Note that, for t > the device effectively operates in FD OFF full fast-decay mode. D12 and D13 – Master Clock Control An internal oscillator can be used for the timing functions, and if more precise control is required, an external clock can be input to the OSC terminal (for configuration information, refer to the Functional Description section) ...
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... All drivers are turned off when the junction temperature reaches 165°C typical. This is intended only to protect the A3985 from failures due to excessive junction temperatures. Thermal protection will not protect the A3985 from continu- ous short circuits. Thermal shutdown has a hysteresis of approximately 15°C. ...
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... A3985 Pin-out Diagram Terminal List Table Number Dual Full-Bridge MOSFET Driver C2A 1 38 C2B GH2A 2 37 GH2B Bridge 2 3 S2A 36 S2B Control ...
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... A3985 38X 0.10 [.004] C 0.27 .011 38X 0.17 .007 0.08 [.003 0.30 1.85 .073 NOM NOM The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products ...