CS61535A Cirrus Logic, Inc., CS61535A Datasheet - Page 10

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CS61535A

Manufacturer Part Number
CS61535A
Description
T1-E1 Line Interface Unit for PCM applications
Manufacturer
Cirrus Logic, Inc.
Datasheet

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THEORY OF OPERATION
Enhancements in CS61535A
The CS61535A provides higher performance and
more features than the CS61535 including:
Existing designs using the CS61535 can be converted
to the higher performance, pin-compatible CS61535A
if the transmit transformer is replaced by a pin-com-
patible transformer with a new turns ratio and the 4.4
Introduction to Operating Modes
The CS61535A supports three operating modes
which are selected by the level of the MODE pin
10
ANCE MONITOR
AIS DETECTION
INPUT LEVEL
ENCODER &
resistor used in E1 75
LINE CODE
PERFORM-
MODE-PIN
DECODER
CONTROL
METHOD
50% lower power consumption,
Internally matched transmitter output imped-
ance for improved signal quality,
Optional AMI, B8ZS, HDB3 encoder/decoder
or external line coding support,
Receiver AIS (unframed all ones) detection,
ANSI T1.231-1993 compliant receiver Loss
of Signal (LOS) handling,
Transmitter TTIP and TRING outputs are
forced low when TCLK is static,
The Driver Performance Monitor operates
over a wider range of input signal levels.
Elimination of the requirement that a refer-
ence clock be input on the ACLKI pin.
DRIVER
Table 1. Differences in Operating Modes
HARDWARE
INDIVIDUAL
CONTROL
LINES
NONE
<0.2V
YES
NO
applications is shorted.
HARDWARE
INDIVIDUAL
EXTENDED
PARALLEL
CONTROL
FLOAT, or
SELECT
LINES &
B8ZS,
HDB3
CHIP
2.5V
AMI,
YES
MODE
NO
>(RV+) - 0.2V
-PROCESSOR
SERIAL
HOST
PORT
NONE
YES
NO
as shown in Tables 1 and 2, Figure 7, and Figures
A1-A3 of the Applications section.
The CS61535A modes are Hardware Mode, Ex-
tended Hardware Mode, and Host Mode. In
Hardware and Extended Hardware Modes, discrete
pins are used to configure and monitor the device.
The Extended Hardware Mode provides a parallel
chip select input which latches the control inputs
allowing individual ICs to be configured using a
common set of control lines. In the Host Mode, an
external processor monitors and configures the de-
vice through a serial interface. There are thirteen
multi-function pins whose functionality is deter-
mined by the operating mode (see Table 2).
Transmitter
The transmitter takes data from a T1 (or E1) ter-
minal, attenuates jitter, and produces pulses of
appropriate shape. The transmit clock, TCLK,
and transmit data, TPOS & TNEG or TDATA, are
supplied synchronously. Data is sampled on the
falling edge of the input clock, TCLK.
Either T1 (DSX-1 or Network Interface) or E1
G.703 pulse shapes may be selected. Pulse shap-
ing and signal level are determined by "line
length select" inputs as shown in Table 3. The
RECEIVER/DPM
TRANSMITTER
FUNCTION
CONTROL
PIN
Table 2. Pin Definitions
17
18
18
23
24
25
26
27
28
11
3
4
6
7
HARDWARE
RLOOP
MRING
LLOOP
RNEG
TPOS
TNEG
RPOS
TAOS
MTIP
LEN0
LEN1
LEN2
DPM
-
HARDWARE
EXTENDED
MODE
RCODE
TCODE
RLOOP
LLOOP
TDATA
RDATA
TAOS
LEN0
LEN1
LEN2
BPV
PCS
AIS
-
CS61535A
DS40F2
MRING
RNEG
RPOS
HOST
TPOS
TNEG
SCLK
CLKE
MTIP
DPM
SDO
INT
SDI
CS
-

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