CM6800 Champion Microelectronic Corp., CM6800 Datasheet - Page 11

• Manufacturer Part Number: CM6800
• Description: LOW START UP CURRENT PFC/PWM CONTROLLER COMBO
• Manufacturer: Champion Microelectronic Corp.

Error Amplifier Compensation
The PWM loading of the PFC can be modeled as a
negative resistor; an increase in input voltage to the PWM
causes a decrease in the input current. This response
dictates the proper compensation of the two
transconductance error amplifiers. Figure 2 shows the types
of compensation networks most commonly used for the
voltage and current error amplifiers, along with their
respective return points. The current loop compensation is
returned to V
PFC: as the reference voltage comes up from zero volts, it
creates a differentiated voltage on I
PFC from immediately demanding a full duty cycle on its
boost converter.
PFC Voltage Loop
There are two major concerns when compensating the
voltage loop error amplifier, V
response. Optimizing interaction between transient
response and stability requires that the error amplifier’s
open-loop crossover frequency should be 1/2 that of the
line frequency, or 23Hz for a 47Hz line (lowest anticipated
international power frequency). The gain vs. input voltage
of the CM6800/1’s voltage error amplifier, V
specially shaped non-linearity such that under steady-state
operating conditions the transconductance of the error
amplifier is at a local minimum. Rapid perturbation in line or
load conditions will cause the input to the voltage error
amplifier (V
this happens, the transconductance of the voltage error
amplifier will increase significantly, as shown in the Typical
Performance Characteristics. This raises the
gain-bandwidth product of the voltage loop, resulting in a
much more rapid voltage loop response to such
perturbations than would occur with a conventional linear
gain characteristics.
2004/02/11
18
2
4
3
7
IAC
VFB
VRMS
ISENSE
RAMP1
2.5V
FB
REF
) to deviate from its 2.5V (nominal) value. If
Rev. 1.6
-
+
GMv
to produce a soft-start characteristic on the
VEAO
MODULATOR
.
16
GAIN
0.3V
EAO
-
+
LOW POWER
DETECT
; stability and transient
3.5K
EAO
3.5K
+
-
which prevents the
GMi
Champion Microelectronic Corporation
L
OSCILLATOR
IEAO
.
EAO
OW
1
Figure 1. PFC Section Block Diagram
has a
PFC CMP
S
+
-
17.9V
0.5V
VCC
TART-
+
-
TRI-FAULT
U
-
+
VCC OVP
P
C
2.75V
The Voltage Loop Gain (S)
Z
GM
P
V
380V.
C
PFC Current Loop
The current amplifier, I
the voltage error amplifier, V
of crossover frequency. The crossover frequency of the
current amplifier should be at least 10 times that of the
voltage amplifier, to prevent interaction with the voltage loop.
It should also be limited to less than 1/6th that of the
switching frequency, e.g. 16.7kHz for a 100kHz switching
frequency.
The Current Loop Gain (S)
URRENT
=
≈
=
≈
-1V
CV
IN
OUTDC
DC
∆
V
: Average PFC Input Power
S
∆
∆
V
: Compensation Net Work for the Voltage Loop
v
: PFC Boost Output Capacitor
: Transconductance of VEAO
∆
V
V
V
*
OUTDC
OUTDC
+
-
PFC ILIMIT
D
: PFC Boost Output Voltage; typical designed value is
L
OUT
EAO
ISENSE
PFC OVP
+
-
OFF
*
.
2
*
2
P
*
PFC/PWM C
*
5 .
∆
IN
*
R
∆
∆
V
V
*
∆
S
V
V
∆
OUT
2
*
D
FB
I
EAO
EAO
5 .
GM
OFF
V
*
*
EAO
∆
*
S
I
∆
*
V
∆
*
compensation is similar to that of
V
∆
Z
EAO
I
C
EAO
FB
I
SENSE
CI
EAO
S
R
DC
S
R
with exception of the choice
Q
Q
Q
Q
*
ONTROLLER
REFERENCE
GM
13
7.5V
VCC
V
CM6800/1
*
CLK
Z
CV
Page 11
POWER
FACTOR
CORRECTOR
MNPFC
MPPFC
C
OMBO
PFC OUT
GND
VREF
VCC
14
12