CM28C010-120 Maxwell Technologies, Inc., CM28C010-120 Datasheet - Page 7

• Manufacturer Part Number: CM28C010-120
• Description: Microcircuit Memory Digital CMOS 128k x 8-Bit EEPROM Monolithic Silicon
• Manufacturer: Maxwell Technologies, Inc.

DSCC FORM 2234
APR 97
PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not
affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance
with MIL-PRF-38535, appendix A.
all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with
method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class
M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class
M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through
4.4.4).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on
4.2.1 Additional criteria for device class M.
4.2.2 Additional criteria for device classes Q and V.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-
a.
b.
c.
d.
e.
a.
b.
c.
(1)
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
Prior to burn-in, the devices shall be programmed (see 4.5.2 herein) with a checkerboard pattern or equivalent
(manufacturers at their option may employ an equivalent pattern provided it is a topologically true alternating bit pattern).
The pattern shall be read before and after burn-in. Devices having bits not in the proper state after burn-in shall constitute
a device failure and shall be included in the PDA calculation and shall be removed from the lot.
The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available
to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power
dissipation, as applicable, in accordance with the intent specified in test method 1015.
Interim and final electrical parameters shall be as specified in table IIA herein.
After the completion of all screening, the device shall be erased and verified prior to delivery.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device
manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document
revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535
and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs,
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-
STD-883.
Interim and final electrical test parameters shall be as specified in table IIA herein.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of
MIL-PRF-38535.
DEFENSE SUPPLY CENTER COLUMBUS
Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1c herein).
COLUMBUS, OHIO 43216-5000
MICROCIRCUIT DRAWING
STANDARD
SIZE
A
REVISION LEVEL
G
SHEET
5962-38267
7