STE2002 STMicroelectronics, STE2002 Datasheet
STE2002
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STE2002 Summary of contents
Page 1
... Display Supply Voltage range from 4.5 to 11V Backward Compatibility with STE2001 DESCRIPTION The STE2002 is a low power CMOS LCD controller driver. Designed to drive a 81 rows by 128 columns graphic display, provides all necessary functions in a single chip, including on-chip LCD supply and bias ...
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... STE2002 PIN DESCRIPTION N° Pad Type R0 to R80 129-169 O 282-322 ICON 323 C127 1-128 O V 236-255 GND SS V 188-199 Supply DD1 V 200-211 Supply DD2 V 261-270 Supply LCDIN V 273-282 Supply LCDOUT V 271-272 Supply LCDSENSE V 180, 231, O SSAUX 218 SEL1,2 184,185 I EXT ...
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... Active Procedure Flag. Notice if There is an ongoing Internal Operation or an active reset. Active Low. Test Pads 50kohm pull-down resistor is added on input pis. Test Num. TEST_1 TEST_2 TEST_3 TEST_4 TEST_5 TEST_6 TEST_7 TEST_8 TEST_9 TEST_10 TEST_11 TEST_12 TEST_13 TEST_14 STE2002 Function Pin Configuration OPEN VSS / VSSAUX VSS / VSSAUX 3/51 ...
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... STE2002 Figure 2. Chip Mechanical Drawing COL COL 63 COL 64 COL 127 4/51 MARK_1 0 STE2002 VLCDOUT VLCDSENSE (0, MARK_2 ROW 35 ROW 39. VLCDOUT VLCDSENSE VLCDIN VLCDIN MARK_3 OSCOUT TEST_14 TEST_13 TEST_12 TEST_11 VSS SCL SDAIN SDAOUT VSSAUX RES E PD R/W VSSAUX SCLK SCE ...
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... ....... (t) = C1(t) - R0( (t) = C1(t) - R1(t) 2 ....... ..... 64 FRAME LCD LCD LCD LCD 64 ..... FRAME D00IN1154 STE2002 V ( (t) 2 5/51 ...
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... STE2002 CIRCUIT DESCRIPTION Supplies Voltages and Grounds V is supply voltages to the internal voltage generator (see below). If the internal voltage generator is DD2 not used, this should be connected to V could be different form V . DD2 Internal Supply Voltage Generator The IC has a fully integrated (no external capacitors required) charge pump for the Liquid Crystal Display supply voltage generation. The multiplying factor can be programmed to be: Auto, X6, X5, X4, X3, X2, us- ing the ’ ...
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... The STE2002 provides three bits (BS0, BS1, BS2) for programming the desired Bias Ratio as shown below: BS2 The following table Bias Level for and are provided: Symbol LCD Voltage Generation The LCD Voltage at reference temperature (To = 27°C) can be set using the VOP register content according to ...
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... As the viscosity, and therefore the contrast, of the LCD are subject to change with temperature, there's the need to vary the LCD Voltage with temperature. The STE2002 provides the possibility to change the VLCD in a linear fashion against temperature with eight different Temperature Coefficient selectable through the T2, T1 and T0 bits. Only four of them are available with basic instruction set (TC1 & ...
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... Display Data RAM The STE2002, provides an 104X128 bits Static RAM to store Display data. This is organized into 13 (Bank0 to Bank12) banks with 128 Bytes. One of these banks (128 bits wide) can be used for Icons. RAM access is accomplished in either one of the Bus Interfaces provided (see below). Allowed addresses are X0 to X127 (Horizontal) and Y0 to Y12 (Vertical) ...
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... STE2002 Figure 6. Automatic data RAM writing sequence with V=0 and Data RAM Normal Format (MX=0) 0 BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7 BANK 8 BANK 9 BANK 10 BANK 11 BANK 12 Figure 7. Automatic data RAM writing sequence with V=1 and Data RAM Normal Format (MX=0) 0 BANK 0 BANK 1 BANK 2 ...
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... Figure 13. Automatic data RAM writing sequence with X-Y Carriage Return (V=1; MX=1) 127 126 BANK 0 BANK 1 BANK 2 Y CARR BANK 11 BANK CARR 125 124 X CARR 125 124 STE2002 X CARR 124 125 126 127 X CARR 124 125 126 127 11/51 ...
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... STE2002 Figure 14. Data RAM Byte organization with MSB BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 LSB BANK 5 BANK 6 BANK 7 BANK 8 BANK 9 BANK 10 BANK 11 BANK 12 Figure 15. Data RAM Byte organization with LSB BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 MSB BANK 5 BANK 6 BANK 7 BANK ...
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... R 0 ROW ROW 32 N. ROW ROW 75 ROW 76 N. ROW 96 ICON STE2002 124 125 126 127 Y-CARRIAGE ICON ROW 124 125 126 127 Y-CARRIAGE ICON ROW 124 125 126 127 ICON ROW Y-CARRIAGE 13/51 ...
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... STE2002 Figure 21. Memory Rows vs. Row drivers mapping with MUX65, Y-CARRIAGE>8, SCROLL POINTER=3, ICON MODE=1, PHYSICAL MEMORY ROW ROW DRIVER 0 ROW ROW 1 ROW ROW 33 N. ROW ROW ROW 75 ROW 76 N. ROW 96 ICON Figure 22. Memory Rows vs. Row drivers mapping with MY=1, MUX81, ICON MODE 0,1 SCROLL POINTER=0 ...
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... R57 R58 R59 R60 R61 R62 R63 R64 R65 R66 R67 R68 R69 R70 R71 R72 R73 R74 R75 STE2002 124 125 126 127 Y-CARRIAGE ICON ROW ICON ROW DRIVERS R10 ...
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... MUX 49 Mode COLUMN DRIVERS R40 R41 R42 R43 R44 R45 R46 R47 R48 R49 R50 R51 R52 R53 R54 R55 STE2002 R56 R57 R58 R59 R60 R61 R62 R63 R64 R65 R66 R67 R68 R69 R70 R71 R72 R73 R74 ...
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... R66 R25 R67 R26 R68 R27 R69 R28 R70 R29 R71 R30 R72 R31 R73 R32 R74 R33 R75 R34 - Bias system (BS[ Multiplexing Ratio (M[1:0]=0) - Frame Rate (FR[1:0]=”75Hz”) - Power Down ( Dual Partial Display Disabled (PE= STE2002 ROW DRIVERS LR0106 17/51 ...
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... SCLK rising edge for the Serial interface, last SCL rising edge for the I Scrolling function The STE2002 can scroll the graphics display in units of raster-rows. The scrolling function is achieved changing the correspondence between the rows of the logical memory map and the output row drivers. ...
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... SECTION2 Icon Row Icon Row Icon Row Icon Row Icon Row Icon Row Icon Row Icon Row STE2002 ICON Row Driver with MY=0 R56 R56 R64 R64 R72 R72 R80 R80 RESET STATE 000 19/51 ...
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... STE2002 Bus Interfaces To provide the widest flexibility and ease of use the STE2002 features three different methods for interfacing the host Controller. To select the desired interface the SEL1 and SEL2 pads need to be connected to a logic LOW (connect to GND logic HIGH (connect to VDD). All the I/O pins of the unused interfaces must be connected to GND ...
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... All slaves with the corresponding address acknowledge in parallel, all the others will ignore the I Writing Mode. If the R/W bit is set to logic 0 the STE2002 is set receiver. After the slaves acknowledge one or more command word follows to define the status of the device. A command word is composed by two bytes. The first is a control byte which defines the Co and D/C values, ...
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... Every byte of a command word must be acknowledged by all addressed units. After the last control byte, if D/C is set to a logic 1 the incoming data bytes are stored inside the STE2002 Display RAM starting at the address specified by the data pointer. The data pointer is automatically updated after every byte written and in the end points to the last RAM location written ...
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... Care Care Care DB7 DB6 DB5 LSB DB4 DB3 DB2 DB1 DB0 DB7 Don't Don't Don't Don't Don't DB7 DB6 Care Care Care Care Care High-Z DB4 DB3 DB2 DB1 DB0 I2C Address Read STE2002 D00IN1159 DB6 DB5 D00IN1160 DB5 D00IN1160 23/51 ...
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... Diver Parallel Interface The STE2002 parallel Interface is a bidirectional link between the display driver and the application supervisor. It consists of eleven lines: eight data lines (from DB7 to DB0) and three control lines. The control lines are: en- able (E) for data latch, PD/C for mode selection and R/W for reading or writing ...
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... Y1 Y0 Set Horizontal (Y) RAM Address X1 X0 Set Vertical (X) RAM Address 0 1 Starts Checker Board Procedure 1 MUX Selects MUX factor TC1 TC0 Set Temperature Coefficient for function Set desired Bias Ratios X X Not to be used V register Write instruction OP STE2002 LDC 25/51 ...
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... STE2002 Table 2. Extended Instruction Set Instruction D/C R/W NOP 0 0 Function Set 0 0 Read Status Byte 0 1 Write Data 1 0 Memory Blank 0 0 Scroll Range Setting 0 0 LCD Display Control 0 0 Set CP Factor 0 0 Set RAM Set RAM Checker Board ...
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... Vertical addressing X axis address is mirrored. Image is displayed vertically mirrored MSB on BOTTOM Partial Display enabled Select page 1 DESCRIPTION DESCRIPTION DESCRIPTION 65Hz 70Hz 75Hz 80Hz DESCRIPTION 2.94 6.78 10.62 Not Used STE2002 RESET 1 STATE MUX 33 0 RESET STATE Page 0 RESET STATE D=0 E=0 RESET STATE ...
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... STE2002 Table 8. MULTIPLEXING RATIO M[1] M[ Table 9. TEMPERATURE COEFFICIENT Table 10. TC1 TC0 Table 11. CHARGE PUMP MULTIPLICATION FACTOR CP2 CP1 CP0 ...
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... Y-CARRIAGE =1 Y-CARRIAGE =2 Y-CARRIAGE =3 Y-CARRIAGE =4 Y-CARRIAGE =5 Y-CARRIAGE =10 Y-CARRIAGE =11 Y-CARRIAGE =12 SECTION 1 SECTION2 Icon Row Icon Row Icon Row Icon Row Icon Row Icon Row Icon Row Icon Row STE2002 RESET STATE 1000 RESET STATE 000 29/51 ...
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... GND / VSSAUX SEL2 EXT_SET VDD1 VDD1 / GND / VSSAUX SA0 VDD1 / GND / VSSAUX SA1 VSSAUX TEST_10 TEST_9 TEST_8 TEST_7 TEST_6 TEST_5 TEST_4 TEST_3 TEST_2 TEST_1 SCL SDAIN SDAOUT STE2002 VSSAUX RES E PD R/W VSSAUX SCLK SCE SD/C SDIN SDOUT BSY_FLG VDD2 ...
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... VDD1 / GND / VSSAUX ICON_MODE SEL1 GND / VSSAUX SEL2 VDD1 EXT_SET VDD1 VDD1 / GND / VSSAUX SA0 VDD1 / GND / VSSAUX SA1 VSSAUX TEST_10 TEST_9 TEST_8 TEST_7 TEST_6 TEST_5 TEST_4 TEST_3 TEST_2 TEST_1 I/O VDD2 40 VDD1 VSS2 128 VSS1 VLCDSENSE 41 VLCDOUT VLCDIN STE2002 P 81x 128 DISPLAY 31/51 ...
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... STE2002 Figure 40. Application Schematic using the Internal LCD Voltage Generator and two separate supplies V DD2 100nF Figure 41. Application Schematic using the Internal LCD Voltage Generator and a single supply 32/51 I/O VDD2 V VDD1 DD1 100nF VSS2 VSS1 VLCDSENSE VLCDOUT VLCDIN I/O V VDD2 DD VDD1 ...
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... Figure 42. Power-Up sequence VDD2 VDD1 RES SCE SCLK SDIN SD/C PD HOST Hi-Z DRIVER SCL SDAIN SOUT Hi-Z SDA OUT OSCIN (HOST) OSC OUT (DRIVER) BSY FLG vdd w(res) Logic (res) RESET POWER ON BOOSTER TABLE INTERNAL OFF LOADED RESET STE2002 LR0116 33/51 ...
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... STE2002 Figure 43. Power-OFF Sequence VDD2 VDD1 RES SCLK SDIN SD/C PD/C E SCE SCl SDAIN R HOST DRIVER SOUT SDA OUT OSCIN (HOST) OSC OUT (DRIVER) BSY FLG 34/51 T w(res) Hi-Z Hi-Z RESET TABLE LOADED LR0117 ...
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... SET PRS[1:0], Vop[6:0], BS[2:0], CP[2:0], FR[1:0], TC, M[1:0] for Normal Display Operation Switch "ON" Booster and Display Control Logic (PD=0) END OF NORMAL DISPLAY MODE CONFIG. ENABLE DUAL PARTIAL DISPLAY SET 1st Sector Start Address SET 2nd Sector Start Address SET PE=1 END OF ENABLING DUAL PARTIAL DISPLAY STE2002 OPTIONAL1 35/51 ...
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... STE2002 Figure 46. Dual Partial Display Mode configuration or Duty Change 36/51 SETUP PARTIAL DISPLAY CONFIGURATION SET Driver in Power Down(PD=1) SET Driver in Partial Display Mode (PE=1) SET PRS[1:0], Vop[6:0], BS[2:0], CP[2:0] for Partial Display Operation SET Partial Display Configuration (PD[2:0]) SET 1st Sector Start Address SET 2nd Sector Start Address SET Driver in Normal Mode (PE=0) END OF PARTIAL DISPLAY CONFIG ...
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... Table 15. Test Pin Configuration Test Numb. TEST_1 TEST_2 TEST_3 TEST_4 TEST_5 TEST_6 TEST_7 TEST_8 TEST_9 TEST_10 TEST_11 TEST_12 TEST_13 TEST_14 LCD ICOR ROW D00IN1155 Pin Configuration OPEN GND GND GLASS TOP VIEW DISPLAY DATA RAM = "1" DISPLAY DATA RAM = "0" STE2002 37/51 ...
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... STE2002 ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Range DD1 V Supply Voltage Range DD2 V LCD Supply Voltage Range LCD I Supply Current SS V Input Voltage (all input pads Input Current Output Current out P Total Power Dissipation (T tot P Power Dissipation per Output ...
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... VOP = 61h, PRS = 2hex voltage that can be generated is dependent on voltage, temperature and (display) load 27°C), maximum tolerance values are measured at the temper- amb STE2002 =-40 to 85°C; unless otherwise specified) amb Min. Typ. Max. V 0.3V ...
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... STE2002 ELECTRICAL CHARACTERISTICS AC OPERATION (V = 1.7 to 3.6V 1.75 to 4.2V; V DD1 DD2 Symbol Parameter INTERNAL OSCILLATOR F Internal Oscillator frequency OSC F External Oscillator frequency EXT F Frame frequency FRAME T RES LOW pulse width w(RES) Reset Pulse Rejection T Internal Logic Reset Time LOGIC (RES vs. V Delay VDD ...
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... Min. Typ. Max. DC 400 DC 3.4 DC 1.7 400 160 160 160 160 160 100 400 400 rCL1 (1) D00IN1153 STE2002 Unit kHz MHz MHz KHz 41/51 ...
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... STE2002 ELECTRICAL CHARACTERISTICS (continued) AC OPERATION (V = 1.7 to 3.6V 1.75 to 4.2V; V DD1 DD2 Symbol Parameter PARALLEL INTERFACE T Enable Cycle Time CY(EN) T Enable Pulse width W(EN) T Address Set-up Time SU(A) T Address Hold Time H(A) T Data Set-Up Time SU(D) T Data Hold Time H(D) T Data Set-Up Time in read Mode SU(D) T Data Hold Time In Read mode HU(D) Figure 50 ...
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... PWL1 WH1 =-40 to 85°C; unless otherwise specified) amb Min. Typ. Max. 150 100 100 100 t PWH2 LR0001 STE2002 Unit and V with IL IH 43/51 ...
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... STE2002 Table 16. Pad Coordinates NAME PAD -3275 -3225 -3175 -3125 -3075 -3025 -2975 -2925 -2875 -2825.0 C10 11 -2775.0 C11 12 -2725.0 C12 13 -2675.0 C13 14 -2625.0 C14 15 -2575.0 C15 16 -2525.0 C16 17 -2475.0 ...
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... C112 -946.5 C113 -946.5 C114 -946.5 C115 -946.5 C116 -946.5 C117 -946.5 C118 -946.5 C119 -946.5 C120 -946.5 C121 -946.5 C122 -946.5 C123 STE2002 PAD +1575.0 -946.5 95 +1625.0 -946.5 96 +1675.0 -946.5 97 +1725.0 -946.5 98 +1775.0 -946.5 99 +1825.0 -946.5 100 +1875.0 -946 ...
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... STE2002 Table 16. Pad Coordinates (continued) NAME PAD C124 125 +3125.0 C125 126 +3175.0 C126 127 +3225.0 C127 128 +3275.0 R40 129 +3571.5 R41 130 +3571.5 R42 131 +3571.5 R43 132 +3571.5 R44 133 +3571.5 R45 134 +3571.5 R46 135 +3571.5 ...
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... VSS_4 +839.5 VSS_5 +946.5 VSS_6 +839.5 VSS_7 +946.5 VSS_8 +946.5 VSS_9 +946.5 VSS_10 +946.5 VSS_11 +946.5 VSS_12 +946.5 VSS_13 STE2002 PAD 218 +625.0 +946.5 219 +575.0 +946.5 220 +525.0 +946.5 221 +475.0 +946.5 222 +425.0 +946.5 223 +375.0 +946 ...
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... STE2002 Table 16. Pad Coordinates (continued) NAME PAD VSS_14 249 -1275.0 VSS_15 250 -1325.0 VSS_16 251 -1325.0 VSS_17 252 -1375.0 VSS_18 253 -1375.0 VSS_19 254 -1425.0 VSS_20 255 -1425.0 TEST_11 256 -1475.0 TEST_12 257 -1525.0 TEST_13 258 -1575.0 TEST_14 259 -1625.0 ...
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... Rows Size -875.0 Pad Size Pad Pitch MARKS Spacing between Bumps mark1 mark2 Table 18. Die Mechanical Dimensions mark3 Die Size mark4 Wafers Thickness STE2002 Bump Dimensions Number 1-187 17.5 212-235 256-260 283-323 188-211 17.5 236-255 ...
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... STE2002 Figure 55. DIE ORIENTATION IN TRAY Mark 1 Figure 56. TRAY INFORMATION A A 50/51 Mark 3 Mark 4 STE2002 DIE IDENTIFICATION Mark 2 Array Size = 13 x5 (65) Units ...
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... The ST logo is a registered trademark of STMicroelectronics Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. 2002 STMicroelectronics - All Rights Reserved ® STMicroelectronics GROUP OF COMPANIES http://www.st.com STE2002 51/51 ...