S1M8821 Samsung Semiconductor, Inc., S1M8821 Datasheet - Page 6

• Manufacturer Part Number: S1M8821
• Description: Interger Rf/if Dual Pll Frequency Synthesizer
• Manufacturer: Samsung Semiconductor, Inc.

S1M8821/22/23
PIN DESCRIPTION
6
(20TSSOP)
Pin No
10
12
13
14
11
1
2
3
4
5
6
7
8
9
-
-
-
(24QFN)
Pin No
24
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
Symbol
CLOCK
CPoRF
OSCin
DATA
finRF
finRF
V
GND
GND
GND
GND
f
Vp1
oLD
LE
DD
-
-
-
1
I / O
N/C
N/C
N/C
O
O
-
-
-
I
I
-
I
-
I
I
I
-
Power supply voltage input for the RF PLL part. V
equal V
must be placed as close as possible to this pin and be
connected directly to the ground plane.
No connection.
Power supply voltage input for RF charge pump(
Internal RF charge pump output for connection to an external
loop filter whose filtered output drives an external VCO.
Ground for RF digital blocks.
RF prescaler input. The signal comes from the external VCO.
The complementary input of the RF prescaler. A bypass
capacitor must be placed as close as possible to this pin and
be connected directly to the ground plane. The bypass
capacitor is optional with some loss of sensitivity.
Ground for RF analog blocks.
Reference counter input. TCXO is connected via a coupling
capacitor.
No connection.
Ground for IF digital blocks.
Multiplexed output of the RF/IF programmable counters, the
reference counters, the lock detect signals and the shift
registers. The output level is CMOS level. (see f
Programmable Truth Table)
CMOS clock input. Serial data for the various counters is
transferred into the 22-bit shift register on the rising edge of
the clock signal.
No connection.
Binary serial data input. The MSB of CMOS input data is
entered first. The control bits are on the last two bits. CMOS
input.
Load enable CMOS input. When LE becomes high, the data
in the shift register is loaded into one of the four latches (by
the control bits).
Ground for IF analog blocks.
DD
2. In order to reject supply noise, bypass capacitors
Description
INTERGER RF/IF DUAL PLL
out
DD
V
1 must
DD
1).