S1M8837 Samsung Semiconductor, Inc., S1M8837 Datasheet - Page 15

• Manufacturer Part Number: S1M8837
• Description: Fractional-n Rf/integer-n If Dual Pll
• Manufacturer: Samsung Semiconductor, Inc.

FRACTIONAL-N RF/INTEGER-N IF DUAL PLL
Data Bit Map (DATA[21:2]) (Continued)
— Counter Reset mode resets R & N counters.
— IF charge pump current can be selected to high current(8X) or low current(1X) mode.
— In the Speedy_Lock mode, the OUT0 and OUT1 pins can be utilized as synchronous switches between active
— For using a programmable CMOS output, the CMOS output bit(W2[21]=L) should be activated and then the
IF_CTL_WORD
CMOS
IF_CP_WORD
foLD
RF_CP_WORD
RF_CTL_WORD
Control Words
low and tri-state. The Speedy_Lock mode activates the OUT0 and OUT1 pins to be connected to GROUND
with a low impedance(< 150 ) while a high charge pump gain(
TRISTATE.
desired logic level should be programmed with the control bits W2[19] for OUT0 and W2[20] for OUT1.
W3[21:18]
W3[17:14]
Control
W1[21]
W1[20]
W1[19]
W2[21]
W2[20]
W2[19]
W2[18]
W2[17]
W3[13]
W4[21]
W4[20]
W4[19]
bits
IF_CNT_RST
PWDN_IF
PWDN
Speedy_Lock
OUT1
OUT0
IF_CP_GAIN
IF_PFD_POL
RF_CP_LVL
RF_PFD_POL
RF_CNT_RST
PWDN_RF
Frac-N_SEL
Acronym
foLD
normal operation
power up
asynchronous
power down
CMOS output
voltage LOW
voltage LOW
1X
negative slope
select LDs and monitoring mode of
internal counters. (FoLD control for
control codes in detail)
select 16-level charge pump current (RF
charge pump gain for control codes in
detail)
negative slope
normal operation
power up
Integer-N mode
LOW (0)
8X) is selected and otherwise to the
IF counter reset
power down
synchronous
power down
Speedy_Lock
mode
voltage HIGH
voltage HIGH
8X
positive slope
positive slope
RF counter reset
power down
Fractional-N
mode
HIGH (1)
IF
IF
RF and IF
pin #23
pin #24
IF charge
pump
IF PFD
Lock
Detector(LD),
Test mode
RF charge
pump
RF PFD
RF
RF
RF; PLL mode
selection
Comments
S1M8836/37
15