HV9931 Supertex, Inc., HV9931 Datasheet - Page 5

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HV9931

Manufacturer Part Number
HV9931
Description
Hv9931 Unity Power Factor Led Lamp Driver
Manufacturer
Supertex, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
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Manufacturer:
SUPERTEX
Quantity:
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Manufacturer:
SUPERTEX
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Input and Output Current Feedback
Two current sense comparators are included in the HV9931.
Both comparators have their non-inverting inputs internally
connected to ground (GND). The CS1 and CS2 inputs are
inverting inputs of the comparators. Connecting a resistor
divider into either of these inputs from a positive reference
voltage and a negative current sense signal programs the
current sense threshold of the comparator. The V
of the HV9931 can be used as the reference voltage. If more
accuracy is needed, an external reference voltage can be
applied. When either the CS1 or the CS2 pin voltage falls
below GND, the GATE pulse is terminated. A leading edge
blanking delay of 215ns (typ) is added. The GATE voltage
becomes high again upon receiving the next clock pulse of
the oscillator circuit.
Referring to the Functional Circuit Diagram, the CS2
comparator is responsible for regulating output current. The
output LED current can be programmed using the following
equation:
Switching Waveform
R
CS 2
=
Io
+
7 5V
.
1
2
I
GATE
L2
R
REF 2
V
i
i
L1
L2
DD
R
0
0
0
S 2
DD
voltage
5
where ∆I
comparator limits the current in the input inductor L1. There
is no charge in the capacitor C1 upon the start-up of the
converter. Therefore, L2 cannot develop the output current,
and the HV9931 starts-up in the input current limiting mode.
The CS1 current threshold must be programmed such that no
input current limiting occurs in normal steady-state operation.
The CS1 threshold can be programmed in accordance with
a similar equation:
where I
MOSFET Gate Driver
Typically, the GATE driving capability of the HV9931 is limited
by the amount of power dissipation in its linear regulator.
Thus, care must be taken selecting a switching MOSFET
to be used in the circuit. An optimal trade-off must be found
between the GATE charge and the on-resistance of the
MOSFET to minimize the input regulator current.
L1(PK)
L2
is the peak-to-peak current ripple in L2. The CS1
is the maximum peak current in L1.
t
t
t
R
CS 1
=
I
7 5V
L1 PK
.
(
)
R
REF 1
R
S 1
HV9931

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