MCP1827S Microchip Technology Inc., MCP1827S Datasheet - Page 19
MCP1827S
Manufacturer Part Number
MCP1827S
Description
1.5a, Low Voltage, Low Quiescent Current Ldo Regulator
Manufacturer
Microchip Technology Inc.
Datasheet
1.MCP1827S.pdf
(32 pages)
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5.0
5.1
The MCP1827/MCP1827S is used for applications that
require high LDO output current and a power good
output.
FIGURE 5-1:
5.1.1
5.2
5.2.1
The
MCP1827/MCP1827S is a function of input voltage,
output voltage, output current and quiescent current.
Equation 5-1 can be used to calculate the internal
power dissipation for the LDO.
EQUATION 5-1:
©
Off
Input Voltage Range = 3.3V ± 5%
3.3V
Where:
2007 Microchip Technology Inc.
P
Temperature Rise = 35.2
On
V
LDO
V
V
OUT(MIN)
internal
Package Type = TO-220-5
DROPOUT (max)
P
IN(MAX)
V
V
APPLICATION
CIRCUITS/ISSUES
Typical Application
V
Power Calculations
DISS
OUT
P
IN
=
SHDN
IN
LDO
V
APPLICATION CONDITIONS
POWER DISSIPATION
maximum = 3.465V
IN
4.7 µF
(
C
minimum = 3.135V
V
1
(typical) = 2.5V
(typical) = 1.2W
IN MAX )
(
= LDO Pass device internal
= Maximum input voltage
= LDO minimum output voltage
I
1
power
MCP1827-2.5
OUT
2
power dissipation
Typical Application Circuit.
)
= 0.550V
= 1.5A maximum
3 4 5
GND
–
V
OUT MIN
dissipation
°
C
(
V
10 k
OUT
)
) I
R
×
Ω
1
= 2.5V @ 1.5A
OUT MAX )
within
PWRGD
(
C
10 µF
2
)
the
MCP1827/MCP1827S
In addition to the LDO pass element power dissipation,
there
MCP1827/MCP1827S as a result of quiescent or
ground current. The power dissipation as a result of the
ground current can be calculated using the following
equation:
EQUATION 5-2:
The
MCP1827/MCP1827S is the sum of the power dissi-
pated in the LDO pass device and the P(I
Because of the CMOS construction, the typical I
the MCP1827/MCP1827S is 120 µA. Operating at a
maximum of 3.465V results in a power dissipation of
0.49 milli-Watts. For most applications, this is small
compared to the LDO pass device power dissipation
and can be neglected.
The
temperature specified for the MCP1827/MCP1827S is
+125
of the MCP1827/MCP1827S, the total internal power
dissipation is multiplied by the thermal resistance from
junction to ambient (Rθ
resistance from junction to ambient for the TO-220-5
package is estimated at 29.3
EQUATION 5-3:
Where:
T
P
°
T
J(MAX)
C
TOTAL
V
AMAX
Rθ
maximum
.
IN(MAX)
total
P
To estimate the internal junction temperature
is
JA
T
I(GND
J MAX
I
VIN
(
= Maximum continuous junction
= Total device power dissipation
= Thermal resistance from junction to
= Maximum ambient temperature
P
power
I GND
temperature
ambient
(
power
)
= Power dissipation due to the
= Maximum input voltage
= Current flowing in the V
=
continuous
)
P
quiescent current of the LDO
with no LDO output current
(LDO quiescent current)
TOTAL
=
JA
V
) of the device. The thermal
dissipation
IN MAX
dissipated
(
°
×
C/W.
Rθ
)
JA
operating
×
+
I
DS22001C-page 19
VIN
T
AMAX
within
within
GND
IN
junction
pin
GND
) term.
the
the
for