CDK3402 Cadeka Microcircuits LLC., CDK3402 Datasheet - Page 10

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CDK3402

Manufacturer Part Number
CDK3402
Description
8-bit, 100/150msps, Triple Video Dacs
Manufacturer
Cadeka Microcircuits LLC.
Datasheet
Data Sheet
Applications Dicussion
Figure 9 below illustrates a typical CDK3402/3403 interface
circuit. In this example, an optional 1.2V bandgap refer-
ence is connected to the V
nal voltage reference source.
Grounding
It is important that the CDK3402/3403 power supply is well-
Printed Circuit Board Layout
Designing with high-performance mixed-signal circuits
demands printed circuits with ground planes. Overall
system performance is strongly influenced by the board
layout. Capacitive coupling from digital to analog circuits
may result in poor D/A conversion. Consider the following
suggestions when doing the layout:
1. Keep the critical analog traces (V
2. Power plane for the CDK3402/3403 should be separate
©2009 CADEKA Microcircuits LLC
IO
from all digital signals. The CDK3402/3403 should be
located near the board edge, close to the analog out-put
connectors.
from that which supplies the digital circuitry. A single
power plane should be used for all of the V
the power supply for the CDK3402/3403 is the same
as that of the system’s digital circuitry, power to the
CDK3402/3403 should be decoupled with 0.1µF and
0.01µF capacitors and iso-lated with a ferrite bead.
R
, IO
G
) as short as possible and as far as possible
GREEN PIXEL
BLUE PIXEL
RED PIXEL
CLOCK
BLANK
INPUT
INPUT
INPUT
SYNC
REF
R7-0
G7-0
B7-0
CLK
SYNC
BLANK
output, overriding the inter-
REF
Triple 8-bit D/A Converter
Figure 9. Typical Interface Circuit Diagram
, I
CDK3402/3403
VDD
+5V
REF
0.1µF
10µF
, COMP, IO
DD
GND
pins. If
S
,
regulated and free of high-frequency noise. Careful power
supply decoupling will ensure the highest quality video
signals at the output of the circuit. The CDK3402/3403 has
separate analog and digital circuits. To keep digital system
noise from the D/A converter, it is recommended that
power supply voltages (V
power source and all ground connections (GND) be made
to the analog ground plane. Power supply pins should be
individually decoupled at the pin.
3. The ground plane should be solid, not cross-hatched.
4. If the digital power supply has a dedicated power plane
5. CLK should be handled carefully. Jitter and noise on this
Evaluation boards are available (CEB3402 and CEB3403),
contact CADEKA for more information.
Related Products
n
n
COMP
R
V
CDK3400/3401 Triple 10-bit 100/150MSPS DACs
CDK3404 Triple 8-bit 180MSPS DAC
IO
IO
IO
REF
REF
Connections to the ground plane should have very short
leads.
layer, it should not be placed under the CDK3402/3403,
the voltage reference, or the analog outputs. Capacitive
coupling of digital power supply noise from this layer
to the CDK3402/3403 and its related analog circuitry can
have an adverse effect on performance.
clock will degrade performance. Terminate the clock line
carefully to eliminate overshoot and ringing.
R
G
B
0.1µF
590Ω
75Ω
75Ω
75Ω
+5V
3.3kΩ
(not required without external reference)
LM185-1.2
(Optional)
Green w/Sync
Z
Z
Z
o
o
o
Blue
Red
= 75Ω
= 75Ω
= 75Ω
DD
) come from the system analog
75Ω
75Ω
75Ω
0.1µF
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10

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