MPC857T Freescale Semiconductor, Inc, MPC857T Datasheet - Page 61

• Manufacturer Part Number: MPC857T
• Description: Mpc857t Powerquicc Integrated Communications Processor
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
1
2
Num
134
135
136
137
138
139
The ratios SyncCLK/RCLK1 and SyncCLK/TCLK1 must be greater or equal to 2/1.
SDACK is asserted whenever the SDMA writes the incoming frame DA into memory.
RENA(CD1)
CLSN(CTS1)
TENA inactive delay (from TCLK1 rising edge)
RSTRT active delay (from TCLK1 falling edge)
RSTRT inactive delay (from TCLK1 falling edge)
REJECT width low
CLKO1 low to SDACK asserted
CLKO1 low to SDACK negated
RCLK1
(Input)
(Input)
RxD1
(Input)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Figure 60. Ethernet Collision Timing Diagram
Figure 61. Ethernet Receive Timing Diagram
Table 22. Ethernet Timing (continued)
Characteristic
2
2
121
124
120
125
121
126
All Frequencies
Min
123
10
10
10
—
—
1
Last Bit
CPM Electrical Characteristics
127
Max
50
50
50
20
20
—
Unit
CLK
ns
ns
ns
ns
ns
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