PIC10F222 Microchip Technology Inc., PIC10F222 Datasheet - Page 49

• Manufacturer Part Number: PIC10F222
• Description: High-performance Microcontrollers With 8-bit A/d
• Manufacturer: Microchip Technology Inc.

DECF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
DECFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected: None
Description:
© 2007 Microchip Technology Inc.
Decrement f
[ label ] DECF f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – 1 → (dest)
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 ≤ f ≤ 31
d ∈ [0,1]
(f) – 1 → d;
The contents of register ‘f’ are dec-
remented. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’,
the result is placed back in register
‘f’.
If the result is ‘0’, the next instruc-
tion, which is already fetched, is
discarded and a NOP is executed
instead making it a two-cycle
instruction.
Unconditional Branch
[ label ]
0 ≤ k ≤ 511
k → PC<8:0>;
STATUS<6:5> → PC<10:9>
GOTO is an unconditional branch.
The 9-bit immediate value is
loaded into PC bits <8:0>. The
upper bits of PC are loaded from
STATUS<6:5>. GOTO is a two-
cycle instruction.
GOTO k
skip if result = 0
INCF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
PIC10F220/222
Increment f
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
(f) + 1 → (dest)
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
Increment f, Skip if 0
[ label ]
0 ≤ f ≤ 31
d ∈ [0,1]
(f) + 1 → (dest), skip if result = 0
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘0’, then the next
instruction, which is already
fetched, is discarded and a NOP is
executed instead making it a two-
cycle instruction.
Inclusive OR literal with W
[ label ]
0 ≤ k ≤ 255
(W) .OR. (k) → (W)
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
INCF f,d
INCFSZ f,d
IORLW k
DS41270E-page 47