PIC16HV785 Microchip Technology Inc., PIC16HV785 Datasheet - Page 59

• Manufacturer Part Number: PIC16HV785
• Description: 20-pin Flash-based 8-bit Cmos Microcontroller
• Manufacturer: Microchip Technology Inc.

8.0
The Capture/Compare/PWM (CCP) module contains a
16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP. The special event trigger is
generated by a compare match and will clear both
TMR1H and TMR1L registers.
REGISTER 8-1:
© 2006 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULE
bit 7-6
bit 5-4
bit 3-0
CCP1CON: CCP OPERATION REGISTER (ADDRESS: 15h)
bit 7
Unimplemented: Read as ‘0’.
DC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M<3:0>: CCP Mode Select bits
0000 = Capture/Compare/PWM off (resets CCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin
1011 = Compare mode, trigger special event (CCP1IF bit is set; TMR1 is reset, and A/D
110x = PWM mode: CCP1 output is high true.
111x = PWM mode: CCP1 output is low true.
Legend:
R = Readable bit
-n = Value at POR
U-0
—
is unaffected)
conversion is started if the A/D module is enabled. CCP1 pin is unaffected.)
U-0
—
DC1B1
R/W-0
Preliminary
W = Writable bit
‘1’ = Bit is set
DC1B0
R/W-0
TABLE 8-1:
PIC16F785/HV785
CCP Mode
Compare
CCP1M3
Capture
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PWM
CCP MODE – TIMER
RESOURCES REQUIRED
CCP1M2
R/W-0
x = Bit is unknown
Timer Resource
CCP1M1
R/W-0
DS41249D-page 57
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0