TSSIO16E ATMEL Corporation, TSSIO16E Datasheet - Page 2

• Manufacturer Part Number: TSSIO16E
• Description: Tssio16e Van Peripheral Circuit 16 Inputs-outputs
• Manufacturer: ATMEL Corporation

2. General Description / Block Diagram
The block diagram given below shows the organization of the circuit as two blocks: the VAN con-
troller (block 1), and the groups of specific functions (block 2) relative to the TSSIO16E. These
are based on management of 16 inputs-outputs grouped together to form two 8-bit bi-directional
programmable ports: port A and port B. The circuit thus ensures double exchange of informa-
tion with the VAN bus (via the line interface) on the one hand and the active environment on the
other.
The bus data is supplied to the circuit (after shaping by the line transmitter/receiver) through 3
input lines RXD0, RXD1 and RXD2 selected one after another when communication on one of
the lines is defective (line diagnosis system). Operation outside of the RXD0 line is referred to
as in degrated mode. If perturbations persist in reception the circuit switches to the safety
mode (INT = 1) which, by default, ensures safety functions by activating or inhibiting external cir-
cuitry. Two CONTROL and STATUS 8-bit registers, are used respectively for setting operation
to a given configuration, and for diagnosing the state of the circuit.
The write and read modes of ports A and B are determined by decoding the local address of the
identifier field in the VAN frame.
The behaviour of each port can be configured by three registers: DATA, DDR (Data Direction
Register) and OPT (Option Register).
External address decoding by 3 pins produces 8 TSSIO16E circuits on the same bus.
TSSIO16E
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4421B–ASSP–10/05