LMX2353 National Semiconductor Corporation, LMX2353 Datasheet - Page 13

• Manufacturer Part Number: LMX2353
• Description: Pllatinum? Fractional N Single 2.5 Ghz Low Power Frequency Synthesizer
• Manufacturer: National Semiconductor Corporation

Divide Ratio
2.0 Programming Description
2.3.2.4 Power Down Mode (PWDN_MODE)
Synchronous Power Down Mode
The PLL loop can be synchronously powered down by setting the PWDN mode bit HIGH (F2_19=1) and then asserting the power
down mode bit (N20 = 1). The power down function is gated by the charge pump. Once the power down program bit is loaded,
the part will go into power down mode upon the completion of a charge pump pulse event.
Asynchronous Power Down Mode
The PLL loop can be asynchronously powered down by setting the PWDN mode bit LOW (F2_19=0) and then asserting the
power down mode bit (N20 = 1). The power down function is NOT gated by the charge pump. Once the power down program bit
is loaded, the part will go into power down mode immediately.
2.3.3 Feedback Divide Ratio (NB Counter)
Note: B-counter divide ratio must be
NB_CNTR
2.3.4 Swallow Counter Divide Ratio (NA Counter)
Note: Swallow Counter Value: 0 to 31.
NB_CNTR
2.3.5 Fractional Modulus Accumulator (FRAC_CNTR)
2.3.6 Pulse Swallow Function
f
f
F:
B:
A:
f
VCO
VCO
OSC
1023
Modulus 15
:
:
Divide Ratio
= [N+F] x [f
3
4
•
Divide
Ratio
14/15
1/15
2/15
Output frequency of external voltage controlled oscillator (VCO)
Fractional ratio (contents of FRAC_CNTR divided by the fractional modulus)
Preset divide ratio of binary 10-bit programmable counter (3 to 1023)
Preset divide ratio of binary 5-bit swallow counter
0
0
A +2
Output frequency of the external reference frequency oscillator
N/A
0
•
31
<
<
(NA_CNTR +2).
(NA_CNTR +2).
0
1
•
A
A
<
<
<
B
OSC
31 {P=32};
15 {P=16};
N_18
/R] where N = (PxB) + A
0
0
1
•
N_17
3.
Modulus 16
0
0
1
•
Divide
N_8
Ratio
14/16
15/16
1/16
2/16
0
0
1
•
0
•
N_16
0
0
1
•
(Continued)
N_15
N_7
0
0
1
•
0
0
1
•
N_3
0
0
0
1
1
•
13
N_14
NB_CNTR[9:0]
0
0
1
•
NB_CNTR[4:0]
N_6
N_13
0
0
1
•
0
0
1
N_2
•
0
0
0
1
1
•
FRAC_CNTR[3:0]
N_12
0
0
1
•
N_5
0
0
1
N_1
•
N_11
0
0
1
1
1
•
0
1
1
•
N_10
1
0
1
•
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N_4
N_0
0
1
1
•
0
1
0
0
1
•
N_9
1
0
1
•