LMX2324 National Semiconductor Corporation, LMX2324 Datasheet - Page 6

• Manufacturer Part Number: LMX2324
• Description: Pllatinum? 2.0 Ghz Frequency Synthesizer For Rf Personal Communications
• Manufacturer: National Semiconductor Corporation

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Register
N
R
2.0 Programming Description
2.1 MICROWIRE INTERFACE
The LMX2324 register set can be accessed through the MICROWIRE interface. A 18-bit shift register is used as a temporary
register to indirectly program the on-chip registers. The shift register consists of a 17-bit DATA[16:0] field and a 1-bit address
(ADDR) field as shown below. The address field is used to decode the internal register address. Data is clocked into the shift
register in the direction from MSB to LSB, when the CLOCK signal goes high. On the rising edge of Load Enable (LE) signal, data
stored in the shift register is loaded into the addressed latch.
2.1.1 Registers’ Address Map
When Load Enable (LE) is transitioned high, data is transferred from the 18-bit shift register into the appropriate latch depending
on the state of the ADDRESS bit. A multiplexing circuit decodes the address bit and writes the data field to the corresponding
internal register.
2.1.2 Register Content Truth Table
MSB
N16
R16
17
X
N15
R15
16
X
N14
R14
15
X
TEST
N13
R13
14
NB_CNTR[9:0]
N12
R12
RS
13
MSB
17
POL
PD_
N11
R11
12
ADDRESSED
REGISTER
R Register
N Register
DATA[16:0]
N10
CP_
R10
TRI
11
SHIFT REGISTER BIT LOCATION
N9
R9
10
Data Field
N8
R8
9
6
1
N7
R7
8
ADDRESS BIT
ADDR
N6
R6
7
ADDR
1
0
0
R_CNTR[9:0]
N5
R5
6
NA_CNTR[4:0]
LSB
N4
R4
5
N3
R3
4
N2
R2
3
CTL_WORD[1:0]
N1
R1
2
N0
R0
1
ADDR
Field
LSB
0
0
1