LMX2330L National Semiconductor Corporation, LMX2330L Datasheet - Page 20

• Manufacturer Part Number: LMX2330L
• Description: Pllatinum? Low Power Dual Frequency Synthesizer For Rf Personal Communications
• Manufacturer: National Semiconductor Corporation

www.national.com
Application Information
margin. This implies that another resistor of equal value to
R2 will need to be switched in parallel with R2 during the
initial lock period. We must also insure that the magnitude of
the open loop gain, H(s)G(s) is equal to zero at wp’ = 2wp.
K
FASTLOCK CIRCUIT IMPLEMENTATION
A diagram of the Fastlock scheme as implemented in Na-
tional Semiconductors LMX233XL PLL is shown in Figure 5 .
When a new frequency is loaded, and the RF Icp
high the charge pump circuit receives an input to deliver 4
times the normal current per unit phase error while an open
drain NMOS on chip device switches in a second R2 resistor
element to ground. The user calculates the loop filter com-
ponent values for the normal steady state considerations.
The device configuration ensures that as long as a second
vco
, K , N, or the net product of these terms can be
FIGURE 4. Open Loop Response Bode Plot
(Continued)
FIGURE 5. Fastlock PLL Architecture
o
bit is set
20
changed by a factor of 4, to counteract the w
in the denominator of Equation (2) and Equation (3) . The K
term was chosen to complete the transformation because it
can readily be switched between 1X and 4X values. This is
accomplished by increasing the charge pump output current
from 1 mA in the standard mode to 4 mA in Fastlock.
identical damping resistor is wired in appropriately, the loop
will lock faster without any additional stability considerations
to account for. Once locked on the correct frequency, the
user can return the PLL to standard low noise operation by
sending a MICROWIRE instruction with the RF Icp
low. This transition does not affect the charge on the loop
filter capacitors and is enacted synchronous with the charge
pump output. This creates a nearly seamless change be-
tween Fastlock and standard mode.
01280617
01280618
2
term present
o
bit set