MP7613 Exar Corporation, MP7613 Datasheet - Page 8

• Manufacturer Part Number: MP7613
• Description: Octal 12-bit Dac Array D/a Converter With Output Amplifier And Parallel Data/address Mp Control Logic
• Manufacturer: Exar Corporation

data port loads the data into the pre-selected DACS. If CS = 0,
the chip accesses digital data on the bus. Then address bits A0
to A2 select the appropriate DAC and LD1 loads the data into the
first-latch-bank.
loaded, then LD2 enables the second-latch-bank and updates
MP7613
A standard
Rev. 2.00
-processor and TTL/CMOS compatible input
When all 8-channels first-latch-banks are
Note: 1: High, 0: Low, X: Don’t Care
Load Latch 1 of DAC1
Load Latch 1 of DAC2
Load Latch 1 of DAC3
Load Latch 1 of DAC4
Load Latch 1 of DAC5
Load Latch 1 of DAC6
Load Latch 1 of DAC7
Load Latch 1 of DAC8
Load Latch 2 of DAC1
Read Latch 1 of DAC1
Read Latch 1 of DAC2
Read Latch 1 of DAC3
Read Latch 1 of DAC4
Read Latch 1 of DAC5
Read Latch 1 of DAC6
Read Latch 1 of DAC7
Read Latch 1 of DAC8
Reset Latch 1 of DAC1
Reset Latch 2 of DAC1
A0 to A2
Function
LD1
LD2
RD
CS
R1
R2
Note: For timing information see Electrical Characteristics
Table 1. Octal Parallel Data Input 14-Bit DAC Truth Table
3
Decoder
Figure 4. Simplified Parallel Logic Port
3-8
8
8
8
0
0
0
0
1
1
1
1
X
0
0
0
0
1
1
1
1
X
X
A2
8
A1
0
0
1
1
0
0
1
1
X
0
0
1
1
0
0
1
1
X
X
8
A0
0
1
0
1
0
1
0
1
X
0
1
0
1
0
1
0
1
X
X
8
RD
all 8-channels simultaneously. The selected DAC becomes
transparent (activity on the digital inputs appear at the analog
output) when both LD1 = LD2 = 0.
latch-bank which sets the analog output to zero volts (data =
100...00), regardless of digital inputs.
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
X
X
R1 = 0 resets the first-latch-bank. R2 = 0 resets the second-
8
8
LD1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
X
X
1
1
1
1
1
1
1
1
To first latch bank enable
To switches across the first latch
bank for readback enable
To second latch bank enable
To reset all first latch bank
To reset all second latch bank
0
LD2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
X
1
CS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
X
R1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
R2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0