NGB18N40CLB ON Semiconductor, NGB18N40CLB Datasheet
NGB18N40CLB
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NGB18N40CLB Summary of contents
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... Device Package Shipping 2 NGB18N40CLBT4 D PAK 800/Tape & Reel 2 NGB18N40CLBT4G D PAK 800/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NGB18N40CLB/D † ...
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... ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Threshold Temperature Coefficient (Negative) *Maximum Value of Characteristic across Temperature Range. 1. When surface mounted to an FR4 board using the minimum recommended pad size. 2. Pulse Test: Pulse Width v 300 mS, Duty Cycle v 2%. NGB18N40CLBT4 = 25° 125° 25°C J (− ...
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... Turn−Off Delay Time (Resistive) Fall Time (Resistive) Turn−On Delay Time Rise Time *Maximum Value of Characteristic across Temperature Range. 1. When surface mounted to an FR4 board using the minimum recommended pad size. 2. Pulse Test: Pulse Width v 300 mS, Duty Cycle v 2%. NGB18N40CLBT4 Symbol Test Conditions Temperature V CE(on ...
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... Figure 3. Output Characteristics 4.0 3 3.0 2.5 2.0 1.5 1.0 0.5 0.0 −50 − JUNCTION TEMPERATURE (°C) J Figure 5. Collector−to−Emitter Saturation Voltage versus Junction Temperature NGB18N40CLBT4 (unless otherwise noted 4 −40° 3 2 COLLECTOR TO EMITTER VOLTAGE (VOLTS) CE Figure 2 ...
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... Figure 9. Gate Threshold Voltage versus Temperature −50 − 100 TEMPERATURE (°C) Figure 11. Typical Open Secondary Latch Current versus Temperature NGB18N40CLBT4 10000 T = 150° 1000 iss 100 C oss 10 C rss ...
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... Figure 15. Pulse Train Safe Operating Area (Mounted on an Infinite Heatsink 0 5 Figure 17. Circuit Configuration for Short Circuit Test #1 NGB18N40CLBT4 100 DC 10 100 ms 1 0.1 0.01 100 1000 1 COLLECTOR−EMITTER VOLTAGE (VOLTS) Figure 14. Single Pulse Safe Operating Area = 255C) ...
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... Duty Cycle = 0.5 0.2 0.1 10 0.05 0.02 0.01 1 0.1 0.01 Single Pulse 0.001 0.0001 0.00001 0.0001 (Non−normalized Junction−to−Ambient mounted on NGB18N40CLBT4 P (pk DUTY CYCLE 0.001 0.01 t,TIME (S) Figure 19. Transient Thermal Resistance minimum pad area) http://onsemi.com 7 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN ...
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... M 0.280 0.320 7.11 N 0.197 REF 5.00 REF P 0.079 REF 2.00 REF R 0.039 REF 0.99 REF S 0.575 0.625 14.60 V 0.045 0.055 1.14 STYLE 4: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR 5.08 0.04 0.20 mm inches ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NGB18N40CLB/D MAX 9.65 10.29 4.83 0.89 1.40 8.89 2.79 0.64 2.79 1.83 8.13 15.88 1.40 ...