ATPA02 AME, Inc., ATPA02 Datasheet - Page 4

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ATPA02

Manufacturer Part Number
ATPA02
Description
K8 Timing Controller
Manufacturer
AME, Inc.
Datasheet
ATPA02
n
4
Pin Description
Pin No.
I/O Type
10
11
1
2
3
4
5
6
7
8
9
OD
IN
IN
a
t
70
AME, Inc.
CPU_PWRGD
ATX_PWRGD
VDIMM_SEN
ATX_PSON#
VDDA_SEN
SB_PSON#
VLDT_SEN
RST_BTN#
Pin Name
VDD_GD
ACPI_S3
GND
Open-drain with 70mA sink current
I/O Type
OD
OD
IN
IN
IN
IN
IN
IN
IN
IN
TTL level input
Analog input
Function
a
a
a
t
t
t
t
70
t
70
Active-High of this signal indicates VDD voltage is valid.
This signal is usually connected to the power-good output
of the PWM for CPU core voltage
This pin is used to detect the ClawHammer VLDT (1.2V)
power or power-good signal.
This pin is used to detect the ClawHammer VDDA (2.5V)
power or power-good signal.
This pin is used to detect the VDIMM (2.5V/1.8V) power or
power-good signal.
Active low. This signal is connected to the PSON# signal
from the SB or Super I/O to control the on/off of ATX power
supply.
Active high. This signal indicates that the system is in S3
state.
Active-High of this signal indicates all of the voltage from
the ATX power supply is valid.
Ground
Active low. This pin is used to control the on/off of ATX
power supply. Active-Low of this signal will turn on the ATX
power supply. This pin is open-drain output and should be
pulled-up via a resistor to 5VSB externally.
Active low. This function is panel reset botton input with
de-bounce circuit.
Active high. This signal is connected to the Claw Hammer
to indicate all system powers are valid. This pin is open-
drain output and should be pulled-up externally via a
resistor to 2.5V.
K8 Timing Controller
Function
Rev.A.02

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