ST95P08 STMicroelectronics, ST95P08 Datasheet

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ST95P08

Manufacturer Part Number
ST95P08
Description
8 Kbit Serial Spi Eeprom With Positive Clock Strobe
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
The ST95P08 is an 8 Kbit Electrically Erasable
Programmable Memory (EEPROM) fabricated with
STMicroelectronics’s High Endurance Single
Polysilicon CMOS technology. The 8 Kbit memory
is organised as 64 pages of 16 bytes. The memory
is accessed by a simple SPI bus compatible serial
interface. The bus signals are a serial clock input
(C), a serial data input (D) and a serial data output
(Q). The device connected to the bus is selected
when the chip select input (S) goes low. Commu-
nications with the chip can be interrupted with a
hold input (HOLD). The write operation is disabled
by a write protect input (W).
Table 1. Signal Names
February 1999
1 MILLION ERASE/WRITE CYCLES
40 YEARS DATA RETENTION
SINGLE 3V to 5.5V SUPPLY VOLTAGE
SPI BUS COMPATIBLE SERIAL INTERFACE
2 MHz CLOCK RATE MAX
BLOCK WRITE PROTECTION
STATUS REGISTER
16 BYTE PAGE MODE
WRITE PROTECT
SELF-TIMED PROGRAMMING CYCLE
E.S.D.PROTECTION GREATER than 4000V
SUPPORTS POSITIVE CLOCK SPI MODES
C
D
Q
S
W
HOLD
V
V
CC
SS
8 Kbit Serial SPI EEPROM with Positive Clock Strobe
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
Supply Voltage
Ground
Figure 1. Logic Diagram
HOLD
0.25mm Frame
PSDIP8 (B)
8
W
D
C
S
1
V CC
V SS
ST95P08
ST95P08
150mil Width
SO8 (M)
8
Q
1
AI01315
1/16

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ST95P08 Summary of contents

Page 1

... SELF-TIMED PROGRAMMING CYCLE E.S.D.PROTECTION GREATER than 4000V SUPPORTS POSITIVE CLOCK SPI MODES DESCRIPTION The ST95P08 Kbit Electrically Erasable Programmable Memory (EEPROM) fabricated with STMicroelectronics’s High Endurance Single Polysilicon CMOS technology. The 8 Kbit memory is organised as 64 pages of 16 bytes. The memory is accessed by a simple SPI bus compatible serial interface ...

Page 2

... Q pin changes after the falling edge of the clock input. Chip Select (S). This input is used to select the ST95P08. The chip is selected by a high to low transition on the S pin when ’0’ state. At any time, the chip is deselected by a low to high transi- tion on the S pin when ’ ...

Page 3

... Figure 3. Block Diagram HOLD W Control Logic Address Register and Counter High Voltage Generator I/O Shift Register Data Register 16 Bytes X Decoder ST95P08 Status Block Protect AI01272 3/16 ...

Page 4

... ST95P08 Table 3. AC Measurement Conditions Input Rise and Fall Times Input Pulse Voltages 0.2V Input and Output Timing 0.3V Reference Voltages Note that Output Hi-Z is defined as the point where data is no longer driven. (1) Table 4. Input Parameters (T Symbol C Input Capacitance ( Input Capacitance (other pins) ...

Page 5

... Note: 1. Not enough characterisation data were available on this parameter at the time of issue this Data Sheet. The typical value is well below 5ms, the maximum value will be reviewed and lowered when sufficient data is available 5.5V) CC Test Condition 4.5V < < ST95P08 Min Max Unit D.C. 2 MHz 50 ns ...

Page 6

... ST95P08 Figure 5. Output Timing S C MSB OUT Q ADDR.LSB IN D Figure 6. Serial Input Timing S tSLCH C tDVCH MSB IN D HIGH IMPEDANCE Q 6/16 tCH tCLQX tCL tQVCL MSB-1 OUT tQLQH tQHQL tCHDX tCLCH tDLDH tDHDL tSHQZ LSB OUT AI01070B tSHSL tCLSH tCHCL LSB IN AI01071 ...

Page 7

... HOLD is brought high when C is low. During Hold condition D, Q, and C are at a high impedance state. When the ST95P08 is under Hold condition possible to deselect it. However, the serial commu- nications will remain paused after a reselect, and the chip will be reset. ...

Page 8

... The status register may be read at any time, even during a non-volatile write. As soon as the 8th bit of the status register is read out, the ST95P08 enters a wait mode (data on D are not decoded Hi-Z) until it is deselected. The status register format is as follows: ...

Page 9

... First, the device is selected (S = low) and a serial WREN instruction byte is issued. Then, the product is deselected by taking S high. After the WREN instruction byte is sent, the ST95P08 will set the write enable latch and then remain in standby until it is deselected. Then, the write state is entered by selecting the chip, issuing a one byte address (A7-A0), and one byte of data ...

Page 10

... ST95P08 Figure 9. Write Enable Latch Sequence Figure 10. Write Operation Sequence INSTRUCTION HIGH IMPEDANCE Q 10/ HIGH IMPEDANCE BYTE ADDRESS AI01430 ...

Page 11

... DATA BYTE INSTRUCTION STATUS REG. OUT MSB ST95P08 DATA BYTE DATA BYTE AI01320 AI01431 11/16 ...

Page 12

... C D HIGH IMPEDANCE Q POWER ON STATE After a Power up the ST95P08 is in the following state: – The device is in the low power standby state. – The chip is deselected. – The chip is not in hold condition. – The write enable latch is reset. – BP1 and BP0 are unchanged (non-volatile bits). ...

Page 13

... For a list of available options (Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. ST95P08 Package Temperature Range PSDIP8 0.25 mm Frame 6 – SO8 (2) 3 –40 to 125 C 150mil Width 10% only. ST95P08 Option TR Tape & Reel Packing 13/16 ...

Page 14

... ST95P08 PSDIP8 - 8 pin Plastic Skinny DIP, 0.25mm lead frame Symb Typ 7. 2. PSDIP8 Drawing is not to scale. 14/16 mm Min Max Typ 3.90 5.90 0.49 – 3.30 5.30 0.36 0.56 1.15 1.65 0.20 0.36 9.20 9.90 – – 0.300 6.00 6.70 – – 0.100 7.80 – 10.00 3.00 3. inches Min Max 0 ...

Page 15

... Drawing is not to scale. mm Min Max Typ 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 – – 0.050 5.80 6.20 0.25 0.50 0. ST95P08 inches Min Max 0.053 0.069 0.004 0.010 0.013 0.020 0.007 0.010 0.189 0.197 0.150 0.157 – – 0.228 0.244 0.010 0.020 0.016 0.035 0.004 h x 45˚ 15/16 ...

Page 16

... ST95P08 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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