MCF5480 Freescale Semiconductor, Inc, MCF5480 Datasheet - Page 11

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MCF5480

Manufacturer Part Number
MCF5480
Description
Mcf548x Coldfire Microprocessor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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The specifications in
Table 8
Figure 9
Freescale Semiconductor
25.0
25 40 50 60 70
1
2
25.0
AD[12:8]
CLKIN
CLKIN (MHz)
All other values of AD[12:8] are reserved.
DDR memories typically have a minimum speed of 83 MHz. Some vendors specifiy down to 75 MHz. Check with the
memory component specifications to verify.
shows the supported PLL encodings.
00011
00101
01111
correlates CLKIN, internal bus, and core clock frequencies for the 1x–4x multipliers.
PLL Timing Specifications
50.0
1
Table 7
Num
Clock
Ratio
C1
C2
C3
C4
CLKIN
1:2
1:2
1:4
4x
2x
Cycle time
Rise time (20% of Vdd to 80% of vdd)
Fall time (80% of Vdd to 20% of Vdd)
Duty cycle (at 50% of Vdd)
30
are for the CLKIN pin.
CLKIN—PCI and FlexBus
Figure 9. CLKIN, Internal Bus, and Core Clock Ratios
40 50 60 70 80 90 100
Frequency Range (MHz)
Internal Clock (MHz)
50.0
Table 8. MCF548x Divide Ratio Encodings
Internal Clock
41.67–50.0
25.0–41.67
Characteristic
MCF548x ColdFire
Figure 8. Input Clock Timing Diagram
Table 7. Clock Timing Specifications
25.0
C4
C1
100.0
100.0
C4
®
Microprocessor, Rev. 4
Internal XLB, SDRAM Bus,
and PSTCLK Frequency
60
70 80 90 100110120130140150160170180190200
Range (MHz)
50.0–83.33
2x
2x
83.33–100
C3
Min
20
40
100
100.0
2
Core Clock (MHz)
C2
Max
40
60
2
2
Core Frequency Range
Core Clock
Units
PLL Timing Specifications
ns
ns
ns
%
100.0–166.66
166.66–200
(MHz)
200
200.0
200.0
11

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