ADN2811 Analog Devices, Inc., ADN2811 Datasheet - Page 4

no-image

ADN2811

Manufacturer Part Number
ADN2811
Description
Oc-48/oc-48 Fec Clock And Data Recovery Ic With Integrated Limiting Amp
Manufacturer
Analog Devices, Inc.
Datasheet
ADN2811
Parameter
REFCLK DC INPUT CHARACTERISTICS
TEST DATA DC INPUT CHARACTERISTICS
LVTTL DC INPUT CHARACTERISTICS
LVTTL DC OUTPUT CHARACTERISTICS
1
2
3
4
PIN and NIN should be differentially driven, ac-coupled for optimum sensitivity.
PWD measurement made on quantizer outputs in Bypass mode.
Measurement is equipment limited.
TDINP/N are CML inputs. If the drivers to the TDINP/N inputs are anything other than CML, they must be ac-coupled.
Setup Time
Hold Time
Input Voltage Range
Peak-to-Peak Differential Input
Common-Mode Level
Peak-to-Peak Differential Input Voltage
Input High Voltage
Input Low Voltage
Input Current
Output High Voltage
Output Low Voltage
4
(TDINP/N)
Conditions
T
T
@ REFCLKP or REFCLKN
DC-Coupled, Single-Ended
CML Inputs
V
V
V
V
V
S
H
IH
IL
IN
OH
OL
(See Figure 3) OC-48
(See Figure 3) OC-48
, I
= 0.4 V or V
, I
OL
OH
Rev. B | Page 4 of 20
= +2.0 mA
= −2.0 mA
IN
= 2.4 V
Min
140
150
0
100
2.0
−5
2.4
Typ
0.8
VCC/2
Max
VCC
0.8
+5
0.4
Unit
ps
ps
V
mV
V
V
V
V
µA
V
V

Related parts for ADN2811