IR3081A International Rectifier Corp., IR3081A Datasheet - Page 23

• Manufacturer Part Number: IR3081A
• Description: Xphasetm Vr 10 Control Ic
• Manufacturer: International Rectifier Corp.

VOLTAGE LOOP COMPENSATION
The adaptive voltage positioning (AVP) is usually adopted in the computer applications to improve the transient
response and reduce the power loss at heavy load. Like current mode control, the adaptive voltage positioning loop
introduces extra zero to the voltage loop and splits the double poles of the power stage, which make the voltage
loop compensation much easier.
Resistors R
depends on the output capacitors used in the converter. For the applications using Electrolytic, Polymer or AL-
Polymer capacitors and running at lower frequency, type II compensation shown in Figure 12(a) is usually enough.
While for the applications using only ceramic capacitors and running at higher frequency, type III compensation
shown in Figure 12(b) is preferred.
For applications where AVP is not required, the compensation is the same as for the regular voltage mode control.
For converter using Polymer, AL-Polymer, and ceramic capacitors, which have much higher ESR zero frequency,
type III compensation is required as shown in Figure 12(b) with R
Type II Compensation for AVP Applications
Determine the compensation at no load, the worst case condition. Choose the crossover frequency fc between 1/10
and 1/5 of the switching frequency per phase. Assume the time constant of the resistor and capacitor across the
output inductors matches that of the inductor, and determine R
and C
respectively.
C
ceramic capacitor between 10pF and 220pF is usually enough.
Type III Compensation for AVP Applications
Determine the compensation at no load, the worst case condition. Assume the time constant of the resistor and
capacitor across the output inductors matches that of the inductor, the crossover frequency and phase margin of the
voltage loop can be estimated by Equations (27) and (28), where R
CP1
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is optional and may be needed in some applications to reduce the jitter caused by the high frequency noise. A
VO+
VDRP
E
are the equivalent inductance of output inductors and the equivalent capacitance of output capacitors
FB
and R
RFB
RDRP
(a) Type II compensation
C
R
f
DRP
C
CP
CP
1
=
=
=
are chosen according to Equations (13) and (14), and the selection of compensation types
2
2 (
10
π
VDAC
π
*
∗
FB
FB
∗
V
C
RCP
O
R
E
f
L
C
CP
*
∗
E
)
G
Figure 12. Voltage loop compensation network
2
R
+
∗
-
CCP1
1
CS
∗
DRP
C
+
L
E
*
2 (
EAOUT
E
R
∗
π
FB
C
CCP
*
E
∗
f
∗
C
R
R
*
LE
FB
C
*
∗
EAOUT
R
V
C
PWMRMP
)
2
VO+
VDRP
RFB1
CP
DRP
(b) Type III compensation
and C
LE
RFB
RDRP
CFB
CDRP
and C
is the equivalent resistance of inductor DCR.
CP
DRP
from Equations (25) and (26), where L
VDAC
FB
removed.
RCP
+
-
CCP1
EAOUT
CCP
(25)
(26)
(27)
EAOUT
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E