IR3094M International Rectifier Corp., IR3094M Datasheet - Page 14

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IR3094M

Manufacturer Part Number
IR3094M
Description
3 Phase Pwm Controller For Point Of Load
Manufacturer
International Rectifier Corp.
Datasheet

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Power-up in Non-Synchronous Mode
The SYNC LATCH is set by either a UVLO or a Low Enable fault at the beginning of the power-up cycle, keeping all
three low side gate drivers low. The SYNC LATCH is then reset once the FB pin exceeds 78% of VREF to release
the low side gate drive control to the Error-Amp. SCOMP preconditioning is also released at this time. Non-
Synchronous startup helps preventing negative inductor current until current sharing is stabilized.
VCC Under Voltage Lockout (UVLO)
The VCC UVLO function monitors the IR3094’s VCC supply pin and ensures enough voltage is available to power
the internal circuitry. During power-up the fault latch is reset when VCC exceeds 7.5V and all other faults are
cleared. The fault latch is set when VCC drops below 7.0V and SS/DEL is below 3.75V.
5VUVL Under Voltage Lockout (5VUVL)
The 5VUVL function is provided for converters using a separate voltage supply other than VCC for gate driver bias.
The 5VUVL comparator prevents operation by discharging SS/DEL below 3.75V to force EAOUT low. The 5VUVL
comparator has an OK threshold of 4.36V ensuring adequate gate drive voltage is present and a fault threshold of
4.17V.
Power Good Output
The PWRGD pin is an open-collector output and should be pulled up to a voltage source through a resistor. During
soft start, the PWRGD remains low until the output voltage is in regulation and SS/DEL is above 3.75V. The
PWRGD pin becomes low if the fault latch is set. A high level at the PWRGD pin indicates that the converter is in
operation and has no fault, but does not ensure the output voltage is within the specification. Output voltage
regulation within the design limits can logically be assured however, assuming no component failure in the system.
Tri-State Gate Drivers
The GATELX drivers can pull down up to 3.5A peak current and source up to 1.5A. The GATEHX drivers can
source and sink up to 1.5A peak current. An adaptive non-overlap circuit monitors the voltage on the GATEHX and
GATELX pins to prevent MOSFET shoot-through current while minimizing body diode conduction.
The Error Amplifier output of the Control IC drives low in response to any fault condition such as VCC input under
voltage or output overload. The 0% duty cycle comparator detects this and drives both gate outputs low. This tri-
state operation prevents negative inductor current and negative output voltage during power-down.
The Gate Drivers revert to a high impedance “off” state at VCCLX and VCCHX supply voltages below the normal
operating range. An 80k
from rising due to leakage or other cause under these conditions.
Over Voltage Protection (OVP)
The output Over-Voltage Protection comparator monitors the output voltage through the OVPSNS pin, the positive
remote sense point. If OVPSNS exceeds VREF plus 150mV, the OVP LATCH will be set. This will set the fault
latch immediately pulling the Error Amplifier’s output low, reset the PWM latch to fully turn-off the high side
MOSFETs and turn-on the low side MOSFETs within approximately 350ns. The low side MOSFETs will remain ON
until the OVP LATCH is reset by recycling VCC. OVPSNS exceeding VREF by 150mV also activates 75uA sources
on the OVP pin. The lower MOSFETs alone can not clamp the output voltage however an SCR or MOSFET could
be triggered with the OVP pin to prevent processor damage.
If powering up with a high side MOSFET short, the OVP flag is activated and the OVP LATCH is set with as little
VCC supply voltage as possible. The OVPSNS pin is compared against both VCC and 5VUVL for OVP conditions
at power-up. VCC is monitored for conversion off 12V, 5VUVL is monitored for conversion off 5V. The OVP pin
flags a voltage greater than 0.48V with supply voltages as low as 1.0V. This headroom voltage varies inversely with
temperature. An external comparator can be used to disable the silver box, activate a crowbar, or supply source.
Page 14 of 29
09/26/05

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