IRMCK201 International Rectifier Corp., IRMCK201 Datasheet
IRMCK201
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IRMCK201 Summary of contents
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... Closed loop current loop bandwidth (-3 dB) Closed loop velocity loop update rate PWM carrier frequency PWM counter resolution Current feedback temp drift/offset Max SPI clock Package: QFP100 Data Sheet No. PD60224 Rev.B IRMCK201 33.3 MHz 133.3 MHz 5.5 kHz kHz 83.3 kHz max 12 bit calibrated ...
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... Overview IRMCK201 Main Features IRMCK201 ...
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... IRMCK201 ...
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... IRMCK201 Table of Contents ...
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... IRMCK201 ...
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... IRMCK201 List of Figures List of Tables ...
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... Configuration Ks dt Registers Monitoring Registers j e 2/3 1/T counter speed measurement Figure 1. Basic Block Diagram of IRMCK201 AC Power Analog Speed Reference select A/D A/D MUX interface DC bus feedback IGBT BRAKE module Space IRAMX16UP60A Dead Vector time PWM FAULT Period/Duty IR2175 counters Period/Duty IR2175 ...
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... Monitoring I3 Registers 4096 ID scale +/-16383 = +/-4X of rated current for IQ +/-4095 = +/-rated ID for IM field flux Detailed Block Diagram of IRMCK201 2 ADS7818 CNVST DCV_FDBK A/D Feedforward interface path enable 2 Optional Current Sense DC bus dynamic brake control GSenseL GSenseU ModScl ...
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... Input/Output of IRMCK201 SYSCLK RESETN XPD PLL BYPASSMODE & BYPASSCLK System Clock OSC1CLK OSC2CLK PLLTEST CHGO LPVSS SCLK MISO MOSI CSN Host HP_nOE Communication HP_nWE Interface HP_D[0-7] HP_A HP_nCS TX RX BAUDSEL SYNC START STOP Discrete I/O IFBCAL FLTCLR PWMACTIVE FAULT SCA Serial EEPROM ...
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... HP_A HP_nCS BAUDSEL SYNC O Input (I) / Signal Output (O) IFBCAL START STOP FLTCLR PWMACTIVE O FAULT O IRMCK201 Host Interface Group Low (L) / High (H) True Asserted Positive edge I SPI clock sensitive - Master input and slave output I - Master output and slave input I L SPI chip select I L ...
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... Output (O) ADCLK O ADOUT DAC [3:0] O ADCONVST O ADMUX0 O ADMUX1 O IRMCK201 Low (L) / High (H) True Asserted PWM phase U high side PWM phase U low side Varies, Based on PWM phase V high side Write Register PWM phase V low side 0x0D PWM phase W high side PWM phase W low side ...
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... REDLED O Signal LVDD IC Logic +3.3V power supply AVCC IC Analog +3.3V power supply MVDD IC Phase +3.3V Lock Loop power supply VSSHC IC Phase Lock Loop power supply return IRMCK201 PLL Interface Group Low (L) / High (H) True Asserted I L PLL reset I L Digital logic reset Internal test pin – force to logic ...
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... Isolator IRMCK201 ADCLK ADOUT ADS7818 ADCONVST ADMUX0 ADMUX1 RESSAMPLE HALLA HALLB HALLC ENA DS3486 ENB ENZ DS3486 DS3486 Figure 4. Typical Connection of IRMCK201 Gate Drive or Intelligent IGBT power module 5V (IRAMX16UP60A) 5V IR2175 PO Motor Current Sensing 5V IR2175 PO Anaog reference input DC bus voltage Optional Current 1/4 ...
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... IC Crystal Clock Circuitry XTAL IRMCK201 Figure 5. Oscillator Circuit Table 1: Typical Values for the Clock Circuit IRMCK201 OSC1CLK R2 OSC2CLK ...
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... PLL Clock Circuitry Low Pass Filter IRMCK201 IRMCK201 Table 2: PLL Test Pin Assignments CHGO LPVSS Figure 6. PLL Low Pass Filter Shielding Shielded by LPVSS ...
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... PLL Reset IRMCK201 Table 3: PLL Low Pass Filter Values ...
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... DC Electrical Characteristics and Operating Conditions Absolute Maximum Ratings Recommended Operating Conditions IRMCK201 Table 4: Absolute Maximum Ratings Table 5: Recommended Operating Conditions ...
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... DC Characteristics Common Quiescent and Leakage Current Input Characteristics – Non Schmitt Trigger Inputs Table 7: Non Schmitt Trigger Input Characteristics Input Characteristics – Schmitt Trigger Inputs Output Characteristics IRMCK201 Table 6: DC Characteristics Table 8: Schmitt Trigger Input Characteristics Table 9: Output Characteristics ...
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... Output Characteristics OSC2CLK IRMCK201 Table 10: Output Characteristics OSC2CLK ...
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... REDLED 21 GREENLED 22 VSS 23 N.C. (TSTCLK) 24 N.C. (TSTSEL) 25 N.C. (OLAP) 26 PWMWL 27 PWMWH 28 PWMVL 29 LVDD 30 PWMVH 31 PWMUL 32 VSS 33 PWMUH 34 BRAKE 20K -120K Pull 35 RESETN 36 FLTCLR 20K -120K Pull 37 GATEKILL 38 IFB0 39 IFB1 IRMCK201 5.50 VOLT Pin TOLERANT Type INPUT I - Down I - Down Down ...
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... Pull 66 STOP 20K -120K Pull 67 IFBCAL 20K -120K Pull 68 FLTCLR 69 LVDD 70 PWMACTIVE 71 DAC[3] 72 VSS 73 DAC[2] 74 DAC[1] 75 DAC[0] 20K -120K Pull 76 HP_D[0] 20K -120K Pull 77 HP_D[1] IRMCK201 5.50 VOLT Pin TOLERANT Type INPUT YES YES YES ...
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... Down Down B - Down B - Down I YES I YES I YES YES I YES I YES I YES YES I YES YES Table 12: Pin and I/O Characteristics Table 13: IRMCK201 Power Consumption INPUT DC OUTPUT DC CHARACTERISTIC CHARACTERISTIC TABLE TABLE - - - - - - - - - - - - - - - - - - ...
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AC Electrical Characteristics and Operating Conditions System Level AC Characteristics ...
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GATEKILL FAULT REDLED FLTCLR Figure 8. ...
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... Host Interface AC Characteristics SCLK SCLK t CSS CS MOSI MISO IRMCK201 t MOSIS t MISO Figure 9. SPI Timing Table 16: SPI Timing t MISOZ ...
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... HP_nCS HP_nWE HP_A HP_D[7:0] t HPOENS HP_nOE IRMCK201 t HPWENS t HPA t HPAS t HPZD t HPOENH t HPOEN Figure 10. Host Parallel Read Cycle Timing Table 17: Host Parallel Read Cycle Timing t HPCSN t AHPD VALID t HPDZ ...
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... HP_nCS HP_nWE t HPAS HP_A HP_D[7:0] t HPD[7:0]S HP_nOE IRMCK201 t HPCSN t HPWENS t HPD[7:0] t HPOEN t HPOENS Figure 11. Host Parallel Write Cycle Timing Table 18: Host Parallel Write Cycle Timing ...
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... Discrete I/O Electrical Characteristics IFBCAL START STOP FLTCLR GATEKILL IRMCK201 t L Figure 12. Discrete I/O Timing Table 19: Discrete I/O Timing ...
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... IFB0 IFB1 IRMCK201 DEADTIMERESOLUTION DEADTIMERESOLUTION Figure 13. PWM Timing Table 20: PWM Timing t IFB t t IFBL Figure 14. IR2175 Interface Table 21: IR2175 Interface IFBH ...
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... ENA ENB ENZ HALLA HALLB HALLC RESETN IRMCK201 ENCODER t ENCH t ENCL Figure 15. Encoder Timing Table 22: Encoder Timing VALID t HALLABCS ...
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Analog To Digital Interface Electrical Characteristics System Level Timing SYNC RESSAMPLE t ADCONVST ADCONVST ADMUX0 t ADMUX ADMUX1 ADCLK t ADCLK t ...
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... IRMCK201 Converter Level Timing t 1 ADCLK t ADOUTS ADOUT t 2 ADCONVST RESSAMPLE t 3 ADMUX0 ADMUX1 t ADCLK D11 D10 D2 t HADOUT Figure 17. ADC Specific Timing Table 24: ADC Specific Timing D1 D0 ...
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PLL Interface Electrical Characteristics Table 25: PLL Electrical Characteristics ...
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... IRMCK201 ……………. Data Byte 0 HP_A = 0 HP_A = 0 Host Parallel Data Transfer Format ……………. Data Byte 0 Data Transfer Format Bit Position Register Map Starting Address Command Byte Format ...
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... IRMCK201 Command / Address Byte Byte Count Command Acknowledgement Byte Register Write Acknowledgement 1=Read/ 0=Write Command/Address Byte Format 1=Error/ 0=OK Command Acknowledgement Byte Format 1-6 bytes of register data Register Write Operation Bit Position Register Map Starting Address Bit Position Register Map Starting Address ...
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... IRMCK201 Command / Address Byte Register Read Operation Command Acknowledgement Byte Register Data Register Read Acknowledgement (transfer OK) Command Acknowledgement Byte Register Read Acknowledgement (error) Byte Count Checksum (Byte Count bytes) Checksum Checksum ...
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... IRMCK201 ...
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... IRMCK201 ...
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... Byte Offset 7 6 0x0 0x1 0x3 0x4 0x6 0x7 0x9 0xA 0xB SPARE Field Access Name (R/W) EncCntW MaxEncCnt ZEncCnt IRMCK201 ...
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... SPARE 0xC (W) 0xD SPARE 0xE 0xF IRMCK201 Field Description This value should be set to ((MtrPoles / 2) * (4096 * 4096) / (MaxEncCnt + 1), where MtrPoles is the number of motor W poles. The value is used to convert the encoder count to an angle ranging from 0 - 4095 using the equation: Angle = ((MtrPoles / 2) * 4096 * (encoder count) / (MaxEncCnt + 1)) MOD 4096 ...
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... CurrentFeedbackConfig Write Register Map IRMCK201 Field Description Shutdown control output to IR213x. Upper IGBT gate sense active high gate control active low gate control. Lower IGBT gate sense active high gate control active low gate control. ...
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... PwmEnbW W FocEnbW W Reserved W IRMCK201 Field Description 12-bit signed value for V phase current feedback offset. IfbOffsEnb bit in the SystemControl write register group is "0" this value is automatically added to each current measurement in hardware. 12-bit signed value for W phase current feedback offset. IfbOffsEnb bit in the SystemControl write register group is "0” this value is automatically added to each current measurement in hardware ...
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... IRMCK201 Field Description When IFB PwmEnbW = 1, and FocEnbW = 0, the Current feedback offset is calculated and saved in the CurrentFeedbackOffset read register group. When IfbOffsEnb = 1, the Current feedback offset values in the CurrentFeedbackOffset Read registers are applied to each current feedback measurement. ...
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... Byte Offset 7 6 0x31 0x32 0x33 0x34 0x35 0x36 0x37 IRMCK201 Bit Position VdLim – Direct Current Output Limit (LSBs) (W) VdLim – Direct Current Output Limit (MSBs) (W) CurrentLoopConfig Write Register Map Field Description 15-bit signed quadrature current reference input from velocity loop. ...
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... Velocity loop acceleration in units of SPEED / Velocity loop execution or SPEED / (SpdLpRate / PWM period). SpdDecRate W Velocity loop deceleration in units of SPEED / Velocity loop execution or SPEED / (SpdLpRate / PWM period). VelocityControl Write Register Field Definitions IRMCK201 Bit Position SregLimN – Velocity loop negative Limit (LSBs) (W) SregLimN – ...
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... Byte Offset 7 6 0x44 0x45 IRMCK201 ( Bit Position SPARE FaultControl Write Register Map Field Description DC Bus monitor enable ...
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... PwmData0Sel, PwmData1Sel, W PwmData2Sel, PwmData3Sel DiagnosticPwmControl Write Register Field Definitions IRMCK201 Field Description Space vector modulator scale factor. depends on the PWM carrier frequency, should be set as follows: ModScl = PwmPeriod * sqrt(3) * 4096 / 2355 where PwmPeriod is the value in the PwmConfig write register group’s PwmPeriod register. ...
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... Byte Offset 7 6 0x52 VqSfwd (LSBs) 0x53 IRMCK201 Bit Position ...
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... Byte Offset 7 6 0x58 0x59 0x5A 0x5B Field Access Name (R/W) EncCnt32bW W 32bitQuadDecode Write Register Field Definitions IRMCK201 Bit Position VqSfwd (MSBs) (W) ElecAngW (LSBs) (W) SPARE DirectHostVoltage Control Write Register Map Field Description W 12-bit signed value for synchronous frame direct current when host direct current control is enabled. ...
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... EEPROM write from the data byte in EeDataW to the EEPROM address EeAddrW. EeAddrW W EEPROM Address Register. Contains the address for the next EEPROM read or write operation. EeDataW W EEPROM Data Register. Contains the data for the next EEPROM write operation. EepromControl Write Register Field Definitions IRMCK201 ...
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... Byte Offset 7 6 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D Field Access Name (R/W) W HallCBAnnn (EEPROM ONLY) IRMCK201 – – ...
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... Byte Offset 7 6 Start Stop 0x7 0x8 0x9 IRMCK201 ...
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... IwFbk - W Phase IFB Raw Current (LSBs) 0xD IRMCK201 Field Description PWM Enable bit status. FOC Enable bit status. GATEKILL status. This bit is set by the Gatekill input from the IR2137. Once set, this bit remains set until it is cleared by writing a “ ...
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... Synchronous or rotating frame direct and quadrature voltage values Ud 2’s complement representation. Data ranges are ± VdLim for Ud and ± VqLim for Uq as specified in the CurrentLoopConfig write register group. IRMCK201 Bit Position IwFbk - W Phase IFB Raw Current (MSBs) (R) Id – ...
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... Byte Offset 7 6 0x26 0x27 IRMCK201 Stationary frame Alpha and Beta voltage output component values. Data range is ± VdLim or ± VqLim (as specified in the CurrentLoopConfig write register group), whichever is larger ...
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... Byte Offset 7 6 0x34 0x35 0x36 0x37 32bitQuadDecodeStatus Read Register Map IRMCK201 Field Description Current motor speed in SPEED units. (See the description of SpdScl in the VelocityControl write register group ...
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... EEPROM Address read register shows the value stored in EEPROM at the offset of the EeAddrW write register (0x5D). address in the EEPROM contains the IRMCK201 register map version, the user can read this field to determine whether or not the write registers were initialized at power on. ...
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... Byte Offset 7 6 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 FOCDiagnosticDataSupplement Read Register Map Field Access Name (R/W) ElecAngR R SpdRef R SpdErr R IqRefR R FOCDiagnosticDataSupplement Read Register Field Definitions IRMCK201 ...
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... For reference IRMCK201 Table 27: QFP100 Dimensions ...
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... Appendix C Errata IRMCK201 ...
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... Sales Offices, Agents and Distributors in Major Cities Throughout the World. IRMCK201 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 http://www.irf.com Data and specifications subject to change without notice. 6/1/2004 ...