MTV003 ETC-unknow, MTV003 Datasheet - Page 5

• Manufacturer Part Number: MTV003
• Description: Microprocessor Compatible Monitor Controller
• Manufacturer: ETC-unknow

3.6 Command Interface
The command interface contains 3 pins. Each transfer of command is comprised of 16 DCK clock periods. The
first 8 DCK clocks are for the address and direction of DIO, and the succeeding 8 DCK clocks are for the data.
Each transfer is initiated by setting CMDB Low. The CMDB pin must be pulled High after data transfer is
completed.
- Command Format
B0 - 4 ( ADD4 - 0 )
B5
B6 - 7
B8 - 15 ( DA0 - 7 )
- Register Allocation
a. Read Transfer
b. Write Transfer
Reg #
Reg0
Reg1
Reg2
Reg3
Reg4
Reg #
Reg0
Reg1
Reg2
Reg3
10
11
12
13
1
2
3
4
5
6
7
8
9
20
56.25
59.94
60
60.32
60.53
66.67
70.069
70.08
72
72.378
72.7
87
( W/RB )
( DA7 - 0 )
V-Freq(Hz)
ADD4-0
Address Portion
ADD4-0
B0 - 4
00000
00001
00010
00011
Address Portion
00000
00001
00010
00011
00100
B0 - 4
MYSON
TECHNOLOGY
W/RB
W/RB
: Address of the registers.
: Transfer direction, 1=write, 0=read.
: Reserved.
: Data input when W/RB =1.
B5
B5
1
1
1
1
0
0
0
0
0
Data output when W/RB =0.
Output value hexadecimal 9 bits decimal
CLK4M
V pf0
H pol
B8
HF7
VF7
B8
x
x
x
x
30D
0EA
0DE
0DE
0D9
0D7
0D6
0B3
115
104
104
103
102
TEST
V pol
HF6
VF6
V pf1
B9
B9
x
x
x
x
HS pre
B10
Table 4
HF5
VF5
B10
H pf0
x
x
5/13
x
x
x
Data Portion
VS pre
781
277
260
260
259
258
234
222
222
217
215
214
179
B11
HF4
VF4
B11
H pf1
x
x
Data Portion
DA7 - 0
x
x
x
DA0 - 7
HV pre
HCFF
B12
HF3
VF3
x
B12
VB pl
x
x
x
HF10
B13
HF2
VF2
H sl
x
B13
HB pl
Tolerance (%)
x
x
x
0.12804
0.36101
0.38461
0.38461
0.38610
0.38759
0.42735
0.45045
0.45045
0.46082
0.46511
0.46728
0.55865
MTV003 Revision 2.3 07/01/1998
VCFF
B14
HF9
HF1
VF1
V sl
HV cvs
B14
MTV003N
(MTV003)
x
x
x
B15
HF8
HF0
VF8
VF0
x
B15
x
x
x
x