MBM29LV001TC Fujitsu Microelectronics, Inc., MBM29LV001TC Datasheet
MBM29LV001TC
Related parts for MBM29LV001TC
MBM29LV001TC Summary of contents
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... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 1M (128K MBM29LV001TC FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard world-wide pinouts 32-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 32-pin PLCC (Package suffix: PD) • ...
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... MBM29LV001TC PACKAGE 32-pin plastic TSOP (I) (FPT-32P-M24) 2 /MBM29LV001BC -55/-70 32-pin plastic TSOP (I) Marking Side (FPT-32P-M25) 32-pin plastic QFJ (PLCC) Marking Side (LCC-32P-M02) -55/-70 ...
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... MBM29LV001TC GENERAL DESCRIPTION The MBM29LV001TC/BC are a 1M-bit, 3.0 V-only Flash memory organized as 128K bytes of 8 bits each. The MBM29LV001TC/BC are offered in a 32-pin TSOP(I) and 32-pin PLCC packages. These devices are designed to be programmed in-system with the standard system 3 for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers. ...
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... MBM29LV001TC Top Boot Sector Architecture 4 /MBM29LV001BC -55/- byte 4K byte 4K byte 16K byte 16K byte 16K byte 16K byte ...
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... BLOCK DIAGRAM State Control RESET Command Register CE OE Low V Detector /MBM29LV001BC -55/-70 MBM29LV001TC/MBM29LV001BC +0.3 V -55 –0.3 V +0.6 V — –0 Erase Voltage Generator Program Voltage Chip Enable Generator Output Enable Logic Y-Decoder STB Timer for Address Program/Erase ...
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... /MBM29LV001BC -55/-70 TSOP (I) Marking Side MBM29LV001TC/BC Standard Pinout FPT-32P-M24 Marking Side MBM29LV001TC/BC Reverse Pinout FPT-32P-M25 PLCC LCC-32P-M02 -55/- ...
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... Data Inputs/Outputs Chip Enable OE Output Enable WE Write Enable Hardware Reset Pin/Temporary Sector RESET Unprotection N.C. No Internal Connection V Device Ground SS V Device Power Supply CC MBM29LV001TC/001BC User Bus Operations ...
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... MBM29LV001TC ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29LV001 T C -55 DEVICE NUMBER/DESCRIPTION MBM29LV001 1Mega-bit (128K 3.0 V-only Read, Program, and Erase 8 /MBM29LV001BC -55/-70 PFTN PACKAGE TYPE PFTN = 32-Pin Thin Small Outline Package PFTR = 32-Pin Thin Small Outline Package ...
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... FUNCTIONAL DESCRIPTION Read Mode The MBM29LV001TC/BC have two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...
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... IL code (MBM29LV001TC = EDH and MBM29LV001BC = 6DH). These two bytes/words are given in the tables 3.1 and 3.2. All identifiers for manufactures and device will exhibit odd parity with DQ order to read the proper device codes when executing the autoselect, A Table 3 ...
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... SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 1 SA5 0 1 SA6 1 0 SA7 1 0 SA8 1 1 SA9 1 1 /MBM29LV001BC -55/-70 Sector Address Tables (MBM29LV001TC Sector Address Tables (MBM29LV001BC ...
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... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Protection The MBM29LV001TC/BC feature hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 9). The sector protection feature is enabled using programming equipment at the user’s site. The devices are shipped with all sectors unprotected. Alternatively, Fujitsu may program and protect sectors in the factory prior to shiping the device ...
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... MBM29LV001TC Table 6 MBM29LV001TC/001BC Standard Command Definitions First Bus Bus Write Cycle Command Write Sequence Cycles Req’d Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Read/Reset * 1 1 XXXH F0H Read/Reset * 1 3 555H AAH 2AAH Autoselect 3 555H AAH 2AAH ...
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... Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H returns the device code (MBM29LV001TC = EDH and MBM29LV001BC = 6DH). (See Tables 3.1 and 3.2.) All manufacturer and device codes will exhibit odd parity with DQ bit ...
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... MBM29LV001TC Byte Programming The devices are programmed on a byte-by-byte basis. Programming is a four bus cycle operation. There are two “unlock” write cycles. These are followed by the program set-up command and data write cycles. Addresses are latched on the falling edge WE, whichever happens later and the data is latched on the rising edge WE, whichever happens first ...
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... MBM29LV001TC Sector Erase Sector erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the “set-up” command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector address (any address location within the desired sector) is latched on the falling edge of write pulse, while the command (Data=30H) is latched on the rising edge of write pulse ...
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... MBM29LV001TC Erase Suspend The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads from or programs to a sector not being erased. This command is applicable ONLY during the Sector Erase operation which includes the time-out period for sector erase. The Erase Suspend command will be ignored if written during the Chip Erase operation or Embedded Program Algorithm ...
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... Algorithm is executed by writing program set-up command (A0H) and data write cycles (PA/PD). (Refer to the Figure 24 Extended algorithm.) (3) Extended Sector Protection In addition to normal sector protection, the MBM29LV001TC/BC has Extended Sector Protection as extended function. This function enable to protect sector by forcing V Unlike conventional procedure not necessary to force V RESET pin requires V for sector protection in this mode ...
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... MBM29LV001TC Write Operation Status Status Embedded Program Algorithm Embedded Erase Algorithm Erase Suspend Read (Erase Suspended Sector) In Progress Erase Erase Suspend Read Suspended (Non-Erase Suspended Sector) Mode Erase Suspend Program (Non-Erase Suspended Sector) Embedded Program Algorithm Embedded Erase Algorithm Exceeded Time Limits ...
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... DQ 6 Toggle Bit I The MBM29LV001TC/BC also feature the “Toggle Bit I” method to indicate to the host system that the Embedded Algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the devices will result in DQ toggling between one and zero ...
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... MBM29LV001TC DQ 5 Exceeded Timing Limits DQ will indicate if the program or erase time has exceeded the specified limits (internal pulse count). Under 5 these conditions DQ will produce a “1”. This is a failure condition which indicates that the program or erase 5 cycle was not successfully completed. Data Polling DQ this condition ...
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... Data Protection The MBM29LV001TC/BC are designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the devices automatically reset the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completion of specific multi-bus cycle command sequences ...
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... MBM29LV001TC Write Pulse “Glitch” Protection Noise pulses of less than 5 ns (typical) on OE, CE will not initiate a write cycle. Logical Inhibit Writing is inhibited by holding any one must be a logical zero while logical one. Power-Up Write Inhibit Power-up of the devices with pulse ...
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... Supply Voltages CC MBM29LV001TC/BC-70................................................................. +2 +3.6 V MBM29LV001TC/BC-55................................................................. +3 +3.6 V Operating ranges define those limits between which the functionality of the devices are guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...
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... MBM29LV001TC MAXIMUM OVERSHOOT +0.6 V –0.5 V –2.0 V Figure +2.0 V Figure 2 Maximum Positive Overshoot Waveform 1 +14.0 V +13 +0 This waveform is applied for A Figure 3 Maximum Positive Overshoot Waveform 2 /MBM29LV001BC -55/- Maximum Negative Overshoot Waveform OE, and RESET ...
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... MBM29LV001TC DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) CC4 CC V Current ...
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... CE or OE, Whichever Occurs First — t RESET Pin Low to Read Mode READY Note: Test Conditions: Output Load: 1 TTL gate and 30 pF (MBM29LV001TC/BC-55) 1 TTL gate and 100 pF (MBM29LV001TC/BC-70) Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output:1 ...
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... MBM29LV001TC • Write/Erase/Program Operations Parameter Symbols JEDEC Standard t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data Hold Time WHDX DH — t Output Enable Setup Time OES Output — ...
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... MBM29LV001TC SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM Addresses OEH WE High-Z Outputs Figure 5.1 /MBM29LV001BC -55/-70 INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” ...
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... MBM29LV001TC Addresses RESET Outputs Figure 5.2 30 /MBM29LV001BC -55/- Addresses Stable t ACC t RH High-Z AC Waveforms for Hardware Reset/Read Operations -55/- Output Valid ...
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... MBM29LV001TC 3rd Bus Cycle Addresses 555H WPH t GHWL A0H Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device. ...
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... MBM29LV001TC Addresses Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. ...
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... MBM29LV001TC Addresses 555H GHWL AAH Data t VCS the sector address for Sector Erase. Addresses = 555H for Chip Erase. Figure 8 AC Waveforms Chip/Sector Erase Operations /MBM29LV001BC -55/-70 2AAH 555H 555H WPH t DH 55H ...
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... MBM29LV001TC Data Data Valid Data (The device has completed the Embedded operation.) 7 Figure 9 AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH WE t OES OE DQ Data stops toggling. (The device has completed the Embedded operation.) ...
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... MBM29LV001TC SAX VLHT VLHT WE t CSP CE Data t VCS V CC SAX : Sector Address for initial sector SAY : Sector Address for next sector Figure 11 AC Waveforms for Sector Protection Timing Diagram ...
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... MBM29LV001TC VIDR t VCS RESET CE WE Figure 12 Enter Erase Embedded Suspend Erasing WE Erase Toggle DQ and with OE Note read from the erase-suspended sector /MBM29LV001BC -55/-70 t VLHT Temporary Sector Unprotection Timing Diagram Enter Erase Suspend Program Erase Suspend ...
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... MBM29LV001TC VCS RESET t VLHT t VIDR Add Data 60H SPAX: Sector Address to be protected SPAY : Next Sector Address to be protected TIME-OUT : Time-Out window = 150 s (min) Figure 14 Extended Sector Protection Timing Diagram /MBM29LV001BC -55/-70 SPAX TIME-OUT 60H 40H -55/-70 SPAX ...
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... MBM29LV001TC EMBEDDED ALGORITHMS Increment Address Figure 15 38 /MBM29LV001BC -55/-70 Start Write Program Command Sequence (See below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data Embedded Program TM Algorithm -55/-70 ...
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... MBM29LV001TC EMBEDDED ALGORITHMS Chip Erase Command Sequence (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H Figure 16 /MBM29LV001BC -55/-70 Start Write Erase Command Sequence (See below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector Erase Command Sequence (Address/Command): 555H/AAH 2AAH/55H 555H/80H ...
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... MBM29LV001TC Note rechecked even /MBM29LV001BC -55/-70 Start Read ( Address for programming 0 7 Addr Yes DQ = Data Yes Read ( Addr Yes DQ = Data Fail Pass = “1” because DQ may change simultaneously with Figure 17 ...
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... MBM29LV001TC No Note rechecked even changing to “1”. 5 Figure 18 /MBM29LV001BC -55/-70 Start Read ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “1” because DQ ...
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... MBM29LV001TC Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed 42 /MBM29LV001BC -55/-70 Start Setup Sector Addr PLSCNT = RESET = Activate WE Pulse Time out 100 should remain V 9 Read from Sector (Addr ...
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... MBM29LV001TC Unprotection Completed Notes: 1. All protected sectors are unprotected. 2. All previously protected sectors are protected once again. Figure 20 Temporary Sector Unprotection Algorithm /MBM29LV001BC -55/-70 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector (Note 2) -55/-70 43 ...
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... MBM29LV001TC FAST MODE ALGORITHM Device is Operating in Temporary Sector Unprotection Mode Increment PLSCNT No PLSCNT = 25? Yes Remove V from RESET ID Write Reset Command Device Failed Figure 21 44 /MBM29LV001BC -55/-70 Start RESET = V ID Wait Extended Sector Protection Entry? Yes To Setup Sector Protection Write XXXH/60H ...
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... MBM29LV001TC FAST MODE ALGORITHM Increment Address Figure 22 Embedded Program /MBM29LV001BC -55/-70 Start 555H/AAH 2AAH/55H 555H/20H XXXH/A0H Program Address/Program Data Data Polling Device No Verify Byte? Yes No Last Address ? Yes Programming Completed XXXH/90H XXXH/F0H TM Algorithm for Fast Mode -55/-70 Set Fast Mode In Fast Program Reset Fast Mode ...
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... MBM29LV001TC ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle TSOP(I) PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A PLCC PIN CAPACITANCE ...
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... MBM29LV001TC PACKAGE DIMENSIONS 32-pin plastic TSOP(I) (FPT-32P-M24) LEAD No. 1 INDEX 16 0.15±0.05 (.006±.002) 20.00±0.20 (.787±.008) 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1994 FUJITSU LIMITED F32035S-2C-1 C 32-pin plastic TSOP(I) (FPT-32P-M25) LEAD No. 1 INDEX 16 19.00±0.20 (.748±.008) 0.15± ...
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... MBM29LV001TC PACKAGE DIMENSIONS 32-pin plastic QFJ(PLCC) (LCC-32P-M02) 12.37±0.13 (.487±.005) 11.43±0.08 (.450±.003 INDEX 0.66(.026) TYP 0.43(.017) TYP 10.41±0.51 (.410±.020) 1994 FUJITSU LIMITED C32021S-2C /MBM29LV001BC -55/-70 3.40±0.16 (.134±.006) 2.25±0.38 (.089±.015) ...
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... MBM29LV001TC FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division ...