MBM29QM12DH Fujitsu Microelectronics, Inc., MBM29QM12DH Datasheet
MBM29QM12DH
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MBM29QM12DH Summary of contents
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SPANSION Flash Memory TM Data Sheet September 2003 This document specifies SPANSION Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and ...
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... MBM29QM12DH DESCRIPTION The MBM29QM12DH is 128 M-bit, 3.0 V-only Page mode and dual operation Flash memory organized as 8M words of 16 bits each. The device is offered in 56-pin TSOP and 80-ball FBGA package. This device is designed to be programmed in-system with the standard system 3.0 V Vcc supply. 12.0 V Vpp and 5.0 V Vcc are not required for write or erase operations ...
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... MBM29QM12DH (Continued) The device provides truly high performance non-volatile Flash memory solution. The device offers fast page access times with random access times of 60 ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write enable (WE), and output enable (OE) controls ...
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... Data Polling and Toggle Bit feature for detection of program or erase cycle completion • Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle completion • Automatic sleep mode When addresses remain stable, the device automatically switches itself to low power mode. • Low V write inhibit 2 MBM29QM12DH 31) 31) ) I/O 2 PROMs -60 level ...
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... MBM29QM12DH (Continued) • Program Suspend/Resume Suspends the program operation to allow a read in another byte • Erase Suspend/Resume Suspends the erase operation to allow a read data and/or program in another sector within the same device • In accordance with CFI (Common Flash Memory Interface) • Hardware Reset Pin (RESET) Hardware method to reset the device for reading array data • ...
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... CCQ N. MBM29QM12DH TSOP (1) (Top View) WP/ACC 56 (Marking Side N. N. ...
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... N.C. V N.C. N.C. V N.C. CC CCQ (BGA-80P-M04) MBM29QM12DH Pin Configuration Table Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Hardware Reset Hardware Write Protection/ Program Acceleration Ready/Busy output Pin Not Connected Internally Device Ground Device Power Supply Input & Output Buffer Ground Input & ...
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... State RESET WE Control Status CE & OE Command WP/ACC Control Register Bank D address LOGIC SYMBOL MBM29QM12DH Cell Matrix Cell Matrix 16 Mbit 48 Mbit (Bank A) (Bank B) X-Decoder X-Decoder Bank B Address RY/BY Bank C Address X-Decoder X-Decoder Cell Matrix Cell Matrix 16 Mbit 48 Mbit (Bank D) (Bank C) 23 ...
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... Manufacturer and device codes may also be accessed via a command register write sequence. See “MBM29QM12DH Command Definitions Table” in “ DEVICE BUS OPERATION” can Refer to section on Sector Protection 2 3.6 V for 60 ns ...
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... MBM29QM12DH Command Definitions Table Bus First Bus Write Write Command Cy- Cycle Sequence cles Req’d Addr. Data Addr. Data Read/Reset 1 F0h XXXh Read/Reset 3 555h AAh 2AAh 55h Autoselect 3 555h AAh 2AAh 55h Program 4 555h AAh 2AAh 55h Chip Erase 6 555h AAh 2AAh 55h ...
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... MBM29QM12DH (Continued) Bus First Bus Write Write Command Cy- Cycle Sequence cles Req’ Addr. Data Addr. Data Addr. Data d Password Mode Locking 6 555h AAh 2AAh 55h 555h 60h Bit Program Persistent Protection 6 555h AAh 2AAh 55h 555h 60h SPML 68h SPML 48h ...
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... This command is valid during Fast Mode This command is valid while RESET *3 : This command is valid during HiddenROM mode The data “00h” is also acceptable Command combinations not described in “MBM29QM12DH Command Definitions Table” in “ OPERATION” are illegal. Notes : Address bits ...
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... MBM29QM12DH FLEXIBLE SECTOR-ERASE ARCHITECTURE Bank Sector Bank Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 0 SA8 0 0 SA9 0 0 SA10 0 0 SA11 0 0 SA12 0 0 SA13 0 0 SA14 0 0 SA15 ...
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... SA69 SA70 SA71 SA72 SA73 SA74 SA75 SA76 SA77 MBM29QM12DH Sector Address Table (Bank B) Sector Address ...
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... MBM29QM12DH Bank Address Bank Sector SA78 0 1 SA79 0 1 SA80 0 1 SA81 0 1 SA82 0 1 SA83 0 1 SA84 0 1 SA85 0 1 SA86 0 1 SA87 0 1 SA88 0 1 SA89 0 1 SA90 0 1 SA91 0 1 SA92 0 1 SA93 0 1 SA94 0 1 SA95 ...
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... SA124 0 1 SA125 0 1 Bank B SA126 0 1 SA127 0 1 SA128 0 1 SA129 0 1 SA130 0 1 SA131 0 1 SA132 0 1 SA133 0 1 SA134 0 1 MBM29QM12DH Sector Address ...
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... MBM29QM12DH Bank Sector Bank Address SA135 1 0 SA136 1 0 SA137 1 0 SA138 1 0 SA139 1 0 SA140 1 0 SA141 1 0 SA142 1 0 SA143 1 0 SA144 1 0 SA145 1 0 SA146 1 0 SA147 1 0 SA148 1 0 SA149 1 0 SA150 1 0 SA151 1 0 SA152 ...
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... SA204 SA205 SA206 SA207 SA208 SA209 SA210 SA211 SA212 MBM29QM12DH Sector Address Sector Size ...
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... MBM29QM12DH (Continued) Bank Address Bank Sector SA213 1 1 SA214 1 1 SA215 1 1 SA216 1 1 SA217 1 1 SA218 1 1 SA219 1 1 SA220 1 1 SA221 1 1 Bank C SA222 1 1 SA223 1 1 SA224 1 1 SA225 1 1 SA226 1 1 SA227 1 1 SA228 1 1 SA229 ...
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... SA262 SA263 SA264 SA265 SA266 SA267 SA268 SA269 MBM29QM12DH Sector Address Table (Bank D) Sector Address Sector Size (Kwords ...
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... MBM29QM12DH Sector Group SGA0 0 0 SGA1 0 0 SGA2 0 0 SGA3 0 0 SGA4 0 0 SGA5 0 0 SGA6 0 0 SGA7 0 0 SGA8 0 0 SGA9 0 0 SGA10 0 0 SGA11 0 0 SGA12 0 0 SGA13 0 0 SGA14 0 0 SGA15 0 0 SGA16 0 0 SGA17 0 0 SGA18 ...
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... SGA42 SGA43 SGA44 SGA45 SGA46 SGA47 SGA48 SGA49 SGA50 SGA51 MBM29QM12DH ...
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... MBM29QM12DH (Continued) Sector Group SGA52 1 0 SGA53 1 0 SGA54 1 0 SGA55 1 0 SGA56 1 0 SGA57 1 0 SGA58 1 1 SGA59 1 1 SGA60 1 1 SGA61 1 1 SGA62 1 1 SGA63 1 1 SGA64 1 1 SGA65 1 1 SGA66 1 1 SGA67 1 1 SGA68 1 1 SGA69 ...
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... Erase Block Region 1 Information 2Fh 30h 31h 32h Erase Block Region 2 Information 33h 34h 35h 36h Erase Block Region 3 Information 37h 38h MBM29QM12DH Description 0051h 0052h Erase Block Region 4 Information 0059h 0002h 0000h Query-unique ASCII string “PRI” ...
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... MBM29QM12DH FUNCTIONAL DESCRIPTION Simultaneous Operation The device features functions that enable reading of data from one memory bank while a program or erase operation is in progress in the other memory bank (simultaneous operation addition to conventional features (read, program, erase, erase-suspend read, and erase-suspend program) . The bank can be selected by bank ...
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... Under this condition the current consumed is less than 5 µA Max. Once the RESET pin is set high, the device requires wake-up time for output to be valid for read access. RH During standby mode, the output is in the high impedance state, regardless of OE input. MBM29QM12DH Simultaneous Operation Table Bank 1 Status Read mode Read mode ...
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... When 227Eh is output, it indicates that two additional codes, called Extended Device Codes will be required. Therefore the system may continue reading out these Extended Device Codes at addresses of 0Eh and 0Fh. (Refer to “MBM29QM12DH Sector Group Protection Verify Autoselect Codes Table” and “Extended Autoselect Code Table” in “ DEVICE BUS OPERATION” ) ...
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... Factory Locked area is locked when shipped 7 from the factory. The Customer Indicator Bit (DQ is locked. The Factory Locked area can be programmed and protected at Fujitsu ONLY and is always protected MBM29QM12DH . The RESET pin has a pulse requirement and has used to indicate whether or not the Customer Locked area ...
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... TIMING DIAGRAM” and “Extended Sector Group Protection Algorithm” in “ FLOW CHART”.) If Persistent Protection Bit Lock is set to "1", this mode is disabled. (4) New Sector Protection [Software Protection] A command sector protection method that replaces the old V MBM29QM12DH support both V period. The persistent Sector Protection and the old V Protection Lock Bit is settled. ...
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... The programming of the DPB, PPB, and PPB lock for a given sector can be verified by writing a DPB/PPB lock verify command to the device. MBM29QM12DH ...
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... MBM29QM12DH –DPB Status The programming of the DPB for a given sector can be verified by writing a DPB status verify command to the device. –PPB Status The programming of the PPB for a given sector can be verified by writing a PPB status verify command to the device. –PPB Lock Bit Status The programming of the PPB Lock Bit for a given sector can be verified by writing a PPB Lock Bit status verify command to the device ...
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... Once the V is taken away from the RESET pin, all the previously protected sector groups will be protected again. ID While PPB Lock is set, this device cannot enter the Temporary Sector Unprotection mode. MBM29QM12DH ). During this mode, ID -60 31 ...
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... Extended Device Codes at the address of (BA) 0Eh, as well as at (BA) 0Fh. Notice that the above applies to WORD mode. (Refer to “MBM29QM12DH Sector Group Protection Verify Autoselect Codes Table” and “Extended Autoselect Code Table” in “ DEVICE BUS OPERATION” ) ...
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... The system must write the Program Resume command (address bits are “Bank Address”) to exit from the Program Suspend mode and continue the programming operation. Further writes of the Resume command are ignored. Another Program Suspend command can be written after the device has resumed programming. MBM29QM12DH (Data Polling ...
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... TOW begins. Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29QM12DH Com- mand Definitions Table” in “ Erase command to addresses in other sectors desired to be concurrently erased. The time between writes must be less than “ ...
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... Please note that output data of upper byte ( “0” . Refer to CFI code table (“Common Flash Memory Interface Code Table” “ FLEXIBLE 15 8 MBM29QM12DH bit will be at logic “1”, and and DQ to determine if the erase operation has been ...
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... ( 0), and apply the write pulse during the not protected. Please apply write pulse agian See “MBM29QM12DH Command Definitions ID and OE, set the sector address in the specify ( ...
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... If the Password Mode Locking Bit is set, the PPB Lock Bit status is reflected as set, even after a power-on reset cycle. Exiting the PPB Lock Bit Set command is accomplished by writing the HiddenROM Exit command. MBM29QM12DH . then Password Protection Mode Locking Bit is programmed. ...
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... MBM29QM12DH DPB Write(Erase) Command The DPB Write command is used to set or clear a DPB for a given sector. The high order address bits ( are issued at the same time as the code 01h or 00h during the data write cycle. The DPBs are modifiable at any time, regardless of the state of the PPB or PPB Lock Bit ...
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... Suspended Mode (Non-Erase Suspended Sector Successive reads from the erasing or erase-suspend sector will cause Reading from non-erase suspend sector address will indicate logic “1” at the DQ MBM29QM12DH 2 bit will toggle. However toggles in the case of [1] and [3]. In case of [2], the data toggled in [1] and [3] ...
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... MBM29QM12DH DQ 7 Data Polling The device features Data Polling as a method to indicate to the host that the Embedded Algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce a complement of data last written to DQ read the device will produce true data last written to DQ rising edge of the fourth write pulse in the four write pulse sequences. During the Embedded Erase Algorithm, an attempt to read the device will produce a “ ...
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... Data Polling is only operating function of the device under this condition. The CE circuit will partially power down device under these conditions (to approximately 2 mA) . The OE and WE pins will control the output disable functions as described in “MBM29QM12DH User Bus Operations Table” in “ DEVICE BUS OPERATION”. ...
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... MBM29QM12DH Reading Toggle Bits 3DQ / Whenever the system initially begins reading toggle bit status, it must read DQ to determine whether a toggle bit is toggling. Typically a system would note and store the value of the toggle bit after the first read. After the second read, the system would compare the new value of the toggle bit with the first ...
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... Writing is inhibited by holding any one of OE must be a logical zero while logical one. Power-Up Write Inhibit Power-up of the device with WE The internal state machine is automatically reset to the read mode on power-up. MBM29QM12DH power-up and power-down, a write cycle is locked out for above V (Min) . ...
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... ACC GND and RESET pins is 0.5 V. During voltage transitions 2.0 V for periods ns. Voltage difference between input SS ) does not exceed 9.0 V. Maximum DC input voltage on A Part No. MBM29QM12DH 60/70 A MBM29QM12DH 60/70 CC MBM29QM12DH 60 MBM29QM12DH 70 GND Rating Unit Min Max 55 125 0 ...
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... MAXIMUM OVERSHOOT/MAXIMUM UNDERSHOOT 0.8 V –0.5 V – 2.0 V 14 Note: This waveform is applicable for A MBM29QM12DH Maximum Undershoot Waveform Maximum Overshoot Waveform OE, and RESET. 9 Maximum Overshoot Waveform 2 -60 45 ...
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... MBM29QM12DH DC CHARACTERISTICS 1. DC Characteristics (V CCQ Sym Parameter bol Input Leakage Current I Output Leakage Current OE, RESET Inputs 9 I LIT Leakage Current WP/ACC Accelerated I LIA Program Current 1 V Active Current * I CC CC1 V Active Current * CC2 V Current (Standby CC3 V Current (Standby, Reset) ...
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... Input rise and fall times Input pulse levels: 0 Timing measurement reference level Input: 0.5 V CCQ Output:0.5 V CCQ 3.3 V Diode 1N3064 or equivalent Device Under Test 6 Figure 4.1 Test Conditions MBM29QM12DH Symbol V Test CCQ Setup JEDEC Standard Min AVAV AVQV ACC ...
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... MBM29QM12DH • Write (Erase/Program) Operations Parameter Write Cycle Time Address Setup Time Address Setup Time to OE Low during Toggle Bit Polling Address Hold Time Address Hold Time from High during Toggle Bit Polling Data Setup Time Data Hold Time Output Enable Setup Time ...
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... Program/Erase Valid to RY/BY Delay Delay Time from Embedded Output Enable Sector Erase Time-out Period Erase Suspend Transition Time *1: This does not include the preprogramming time. *2: This timing is for Sector Protection operation. *3: This timing is for Accelerated Program operation. MBM29QM12DH Symbol V 2 CCQ 3 JEDEC Standard Min Typ Max — ...
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... MBM29QM12DH ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Word Programming Time Chip Programming Time Erase/Program Cycle 100,000 Note : Typical Erase conditions T Typical Program conditions T TSOP(1) PIN CAPACITANCE Parameter Input Pin Capacitance Output Pin Capacitance Control Pin Capacitance Control Pin Capacitance (WP/ACC) ...
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... TIMING DIAGRAM • Key to Switching Waveforms WAVEFORM Address OEH WE High-Z Outputs MBM29QM12DH INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Change Change from from May Will Change Change from from "H" or "L": Changing, Any Change ...
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... MBM29QM12DH ACC OEH High-Z Output Address RESET Outputs Hardware Reset/Read Operation Timing Diagram 52 -60 Same page Address PRC PRC PRC PRC PACC PACC PACC ...
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... DQ is the output of the complement of the data written to the device the output of the data written to the device. OUT Figure indicates last two bus cycles out of four bus cycle sequence. Alternate WE Controlled Program Operation Timing Diagram MBM29QM12DH Data Polling ...
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... MBM29QM12DH Address Data Notes : PA is address of the memory location to be programmed data to be programmed at word address the output of the complement of the data written to the device the output of the data written to the device. OUT Figure indicates last two bus cycles out of four bus cycle sequence. ...
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... GHWL AAh Data t VCS the sector address for Sector Erase. Addresses Chip/Sector Erase Operation Timing Diagram MBM29QM12DH 2AAh 555h 555h 2AAh 55h 80h AAh 555h (at word mode) for Chip Erase. -60 SA* 10h for Chip Erase ...
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... MBM29QM12DH Data Data 6 0 RY/ Valid Data (The device has completed the Embedded operation Data Polling during Embedded Algorithm Operation Timing Diagram 56 - OEH WHWH1 Output Flag t BUSY High Valid Data ...
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... Addresses are "Bank Address" where Embedded Algorithm is in progress Addresses are "Sector Address" where Embedded Algorithm (Erase progress stops toggling (The device has completed the Embedded operation Waveforms for Toggle Bit I during Embedded Algorithm Operations MBM29QM12DH ASO AHT AS t CEPH ...
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... MBM29QM12DH Read t RC Address BA1 GHWL WE Valid DQ Output Note : This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2. BA1 : Address corresponding to Bank 1 BA2 : Address corresponding to Bank 2 Enter Erase Embedded Suspend Erasing WE Erase Toggle DQ and ...
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... CE WE RY/BY RY/BY Timing Diagram during Program/Erase Operation Timing Diagram WE RESET t RP RY/BY RESET, RY/BY Timing Diagram MBM29QM12DH Rising edge of the last WE signal Entire programming or erase operations t BUSY READY -60 59 ...
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... MBM29QM12DH VLHT VLHT WE CE Data t VCS V CC SGAX : Sector Group Address to be protected SGAY : Next Sector Group Address to be protected ...
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... VIDR t VCS RESET VLHT RY/BY Temporary Sector Group Unprotection Timing Diagram MBM29QM12DH Program or Erase Command Sequence Unprotection period -60 t VLHT t VLHT 61 ...
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... MBM29QM12DH VCS RESET t VLHT t VIDR Address Data SGAX : Sector Group Address to be protected SGAY : Next Sector Group Address TIME-OUT : Time-Out window Extended Sector Group Protection Timing Diagram 62 - SGAX ...
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... VCC t VACCR t VCS VACC V IH WP/ACC VLHT RY/BY Accelerated Program Timing Diagram MBM29QM12DH t VLHT t VLHT Program Command Sequence Acceleration period -60 63 ...
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... MBM29QM12DH FLOW CHART Embedded Algorithm TM Increment Address 64 -60 Start Write Program Command Sequence (See Below) Data Polling No Verify Data ? Yes No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command) 555h/AAh 2AAh/55h 555h/A0h Program Address/Program Data Embedded Program TM Algorithm Embedded Program Algorithm ...
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... Embedded Algorithm TM Chip Erase Command Sequence (Address/Command) 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h 555h/10h MBM29QM12DH Start Write Erase Command Sequence (See Below) Data Polling Embedded Erase Algorithm No in progress Data FFh ? Yes Erasure Completed Individual Sector/Multiple Sector Erase Command Sequence (Address/Command) 555h/AAh ...
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... MBM29QM12DH * : DQ is rechecked even -60 Start Read ( Addr. VA Yes DQ Data Yes Read Byte ( Addr. VA Yes DQ Data Fail Pass “1” because DQ may change simultaneously with Data Polling Algorithm VA Address for programming ...
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... Addr. Read DQ Addr. Toggle Read DQ Addr. Read DQ Addr. Program/Erase Operation Not Complete.Write Reset Command *1 : Read toggle bit twice to determine whether it is toggling Recheck toggle bit because it may stop toggling as DQ MBM29QM12DH Start * Yes ...
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... MBM29QM12DH Increment Address Embedded Programming Algorithm for Fast Mode 68 -60 Start 555h/AAh 2AAh/55h 555h/20h XXXh/A0h Program Address/Program Data Data Polling No Verify Data? Yes No Last Address? Yes Programming Completed (BA) XXXh/90h XXXh/F0h Set Fast Mode In Fast Program Reset Fast Mode ...
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... PLSCNT = 25? Data = 01h? Yes Remove V from A Protect Another Sector ID 9 Write Reset Command Device Failed Remove V Write Reset Command Sector Group Protection Sector Group Protection Algorithm MBM29QM12DH Start , ...
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... MBM29QM12DH *1 : All protected sector groups are unprotected All previously protected sector groups are reprotected. 70 -60 Start RESET Perform Erase or Program Operations RESET V IH Temporary Sector Group Unprotection Completed *2 Temporary Sector Group Unprotection Algorithm ...
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... PLSCNT 25? Yes Protect Other Sector Remove V from RESET ID Write Reset Command Remove V Write Reset Command Device Failed Sector Group Protection Extended Sector Group Protection Algorithm MBM29QM12DH Start V ID Wait 60h? Yes ...
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... MBM29QM12DH Password Mode Choice Method Password Program Password Protection No (Time out) Yes Reset Command Sector Protection 72 -60 Start Reset Command Mode Yes Bit Program Completed Password Sector Protect Algorithm Password Verify Reset Command ...
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... Start Password Unlock Password Unlock No (Time out) RY/BY Yes DPB/PPB/PPB Lock Bit Status All PPB Erase No (Time out Yes PPB Lock Bit Clear Completed PPB Lock Bit Clear in Password Mode MBM29QM12DH Reset Command 0 Yes Password/Unlock Complete Reset Command 0? -60 73 ...
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... MBM29QM12DH ORDERING INFORMATION Part No. 56-pin plastic TSOP (1) MBM29QM12DH60PCN 80-pin plastic FBGA MBM29QM12DH60PBT MBM29QM12D H 60 DEVICE NUMBER/DESCRIPTION MBM29QM12D 128 Mbit (8M 3.0 V-only, Page Mode and Dual Operation Flash Memory 74 -60 Package Access Time (ns) (FPT-56P-M01) 60 Normal Bend 60 (BGA-80P-M04) PCN PACKAGE TYPE PCN 56-Pin Thin Small Outline Package ...
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... FUJITSU LIMITED F56001S-c-4-5 C MBM29QM12DH Note Resin protrusion. (Each side : 0.15 (.006) Max) . Note These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. ...
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... MBM29QM12DH (Continued) 80-pin plastic FBGA (BGA-80P-M04) 11.00±0.10(.433±.004) (INDEX AREA) 2003 FUJITSU LIMITED B80004S-c-1 -60 +0.12 1.08 –0.13 (Mounting height) +.005 .043 –.005 0.38±0.10 (Stand off) (.015±.004) A 8.00±0.10 (.315±.004) 0.10(.004 Dimensions in mm (inches) . Note : The values in parentheses are reference values. ...
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... MBM29QM12DH FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device ...