NIS1050 ON Semiconductor, NIS1050 Datasheet
NIS1050
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NIS1050 Summary of contents
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... NIS1050 Protection Interface Circuit for PMICs with Integrated OVP Control The NIS1050 is a protection IC targeted at the latest generation of PMICs from the leading mobile phone and UMPC chipset vendors. It includes a highly stable low-current LDO and a low impedance power N-Channel MOSFET. The LDO provides a low current, five volt supply to the PMIC, and the NFET is the external pass element for the OVIC circuit ...
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Table 1. FUNCTIONAL PIN DESCRIPTION Pin Function 1 Source This is the source of the power FET and connects to the PMIC pin of the same name. 2 Gate This pin is the gate of the FET switch ...
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ELECTRICAL CHARACTERISTICS Characteristics POWER FET Zero Gate Voltage Drain Current ( 85°C J Gate-to-Source Leakage Current ( Gate Threshold Voltage ( Negative ...
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DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 4. On−Region Characteristics 5.30 5.25 5.20 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 −40 Mounting ...
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... BOTTOM VIEW The products described herein (NIS1050), may be covered by one or more U.S. patents. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...