AP89341 Aplus Integrated circuits Inc., AP89341 Datasheet - Page 12
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AP89341
Manufacturer Part Number
AP89341
Description
Voice Otp Ic
Manufacturer
Aplus Integrated circuits Inc.
Datasheet
1.AP89341.pdf
(24 pages)
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Ver 3.0
Power-down with RAMP-DOWN (PD2-A9H) or without RAMP-DOWN (PD1-E1H)
1. PDN1 will power-down the chip and set the COUT data to 00H immediately.
2. PDN2 will power-down the chip by Ramp-down the COUT from its current value to 00H.
3. Power-down will start after 350us (at 6KHz sampling rate).
4. The OUT1 pin (BUSY) will output logic HIGH during Ramp-down operation.
5. PDN2 (Power-down with ramp-down) will be executed correctly only if PU2 is
Set OUT2 pin status (STATUS-E3H)
1. Signal output from the pin, OUT2, is defined by G[3:0], as below:
2. If the STATUS is not executed, default value of OUT2 is the internal Reset signal.
3. BUSYB is the logical inversion of BUSY.
4. EMPTY (or FULLB) is the logical inversion of FULL.
5. Only the 1MHz clock will not be stopped by the PAUSE command.
executed before.
Integrated Circuits Inc.
Fig. 14 Setup the status of programmable output pin, OUT2
G[3:0]
000
001
010
011
Fig. 12 Power-down commands timing
BUSYB
OUT2
8KHz
4KHz
2KHz
11
G[3:0]
100
101
110
111
aP89341/170/085
FULLB
OUT2
1MHz
1KHz
16Hz
Aug 17, 2007