P12C508 Microchip Technology, P12C508 Datasheet - Page 11

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P12C508

Manufacturer Part Number
P12C508
Description
8-Pin / 8-Bit CMOS Microcontroller
Manufacturer
Microchip Technology
Datasheet
4.0
PIC12C5XX memory is organized into program mem-
ory and data memory. For devices with more than 512
bytes of program memory, a paging scheme is used.
Program memory pages are accessed using one STA-
TUS register bit. For the PIC12C509 with a data mem-
ory register file of more than 32 registers, a banking
scheme is used. Data memory banks are accessed
using the File Select Register (FSR).
4.1
The PIC12C508 and PIC12C509 each have a 12-bit
Program Counter (PC) capable of addressing a 2K x
12 program memory space.
Only the first 512 x 12 (0000h-01FFh) for the
PIC12C508 and 1K x 12 (0000h-03FFh) for the
PIC12C509 are physically implemented. Refer to
Figure 4-1. Accessing
boundaries will cause a wrap-around within the first
512 x 12 space (PIC12C508) or 1K x 12 space
(PIC12C509). The reset vector is at 0000h. Location
01FFh (PIC12C508) or location 03FFh (PIC12C509)
contains the internal clock oscillator calibration value.
This value should never be overwritten.
1996 Microchip Technology Inc.
MEMORY ORGANIZATION
Program Memory Organization
a
location
above
Advance Information
these
FIGURE 4-1:
Note 1: Address 0000h becomes the effec-
CALL, RETLW
tive reset vector. Location 01FFh
(PIC12C508) or location 03FFh
(PIC12C509) contains the MOVLW
XX clock calibration value.
1024 Word (PIC12C509)
512 Word (PIC12C508)
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC12C5XX
Reset Vector (note 1)
On-chip Program
On-chip Program
Stack Level 1
Stack Level 2
PC<11:0>
Memory
Memory
PIC12C5XX
12
DS40139A-page 11
7FFh
0000h
01FFh
0200h
03FFh
0400h

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